similar to: [LLVMdev] [RFC] [PATCH] add tail call optimization to thumb1-only targets

This seems a very natural approach but I probably am having a trouble with the iterator invalidation. However, looking at other peephole optimizers passes, I couldn't see how to do this: #define BUILD_INS(opcode, new_reg, i) \ BuildMI(*MBB, MBBI, MBBI->getDebugLoc(), TII->get(X86::opcode)) \ .addReg(X86::new_reg, kill).addImm(i) for

I made the change to the BuildMI() call. Again, I don't think that matters. #define BUILD_INS(opcode, new_reg, i) \ BuildMI(*MBB, OldMI, MBBI->getDebugLoc(), TII->get(X86::opcode)) \ .addReg(X86::new_reg, kill).addImm(i) I didn't completely understand your other proposed change: ​ for (MachineBasicBlock::iterator MBBI = MBB->begin();

Thanks for the information. I still don't know how do I partition registers into different classes from the virtual registers? For instance, I have the function who which iterates over the instructions, but I don't know how to write the function which returns the different register class. void RAOptimal::Gather(MachineFunction &Fn) { // Gather just iterates over the blocks,

Because I feel bad for giving a non-answer: An easy way to find if a virtual register is alive after the basic block is to While iterating over the virtual registers - Check to see if the virtual register's "next" value exists outside of the basic block. for instance: std::vector<unsigned> findLiveOut( MachineBasicBlock * mbb ) { std::vector<unsigned> liveout; for(

Hi, I am writing an llvm pass wherein I require to iterate MachineBasicBlocks in reverse. The ilist reverse_iterator is not functioning as expected. Nor is the ilist iterator working in reverse (although -- operator is overloaded to do so). for (MachineFunction::iterator MBBI = mf_->end(), E = mf_->begin();MBBI != E; --MBBI) { MachineBasicBlock *MBB = MBBI;

In many places there is code that looks like: MBBI = next(MBBI); In C++0X there is a std::next that is likely to be in scope when these calls are made. And due to ADL the above call becomes ambiguous: llvm::next or std::next? I recommend: MBBI = llvm::next(MBBI); -Howard

On Nov 14, 2009, at 3:16 PMPST, Howard Hinnant wrote: > In many places there is code that looks like: > > MBBI = next(MBBI); > > In C++0X there is a std::next that is likely to be in scope when these > calls are made. And due to ADL the above call becomes ambiguous: > llvm::next or std::next? > > I recommend: > > MBBI = llvm::next(MBBI); > > -Howard

On Nov 16, 2009, at 10:49 AMPST, Howard Hinnant wrote: > On Nov 16, 2009, at 1:43 PM, Dale Johannesen wrote: > >> >> On Nov 14, 2009, at 3:16 PMPST, Howard Hinnant wrote: >> >>> In many places there is code that looks like: >>> >>> MBBI = next(MBBI); >>> >>> In C++0X there is a std::next that is likely to be in scope when

Hi, while taking a look at X86PadShortFunction.cpp I found that /// addPadding - Add the given number of NOOP instructions to the function /// just prior to the return at MBBI void PadShortFunc::addPadding(MachineBasicBlock *MBB, MachineBasicBlock::iterator &MBBI, unsigned int NOOPsToAdd) { DebugLoc DL = MBBI->getDebugLoc();

Hi All, For various obscure reasons I'd like to detect the condition when X86 CALL instruction immediately precedes a function epilogue in the final emitted code, and insert a NOP between them if that happens. My initial attempt at it looked like this: MachineBasicBlock& MBB; MachineBasicBlock::iterator MBBI; <-- points to where the epilogue would be inserted if (MBBI != MBB.begin()

On Nov 16, 2009, at 1:43 PM, Dale Johannesen wrote: > > On Nov 14, 2009, at 3:16 PMPST, Howard Hinnant wrote: > >> In many places there is code that looks like: >> >> MBBI = next(MBBI); >> >> In C++0X there is a std::next that is likely to be in scope when these >> calls are made. And due to ADL the above call becomes ambiguous: >>

Hi John. > I am putting this information > into my temp. wiki page in hopes of getting it into the dev wiki when > that is available. The dev wiki is up at its temporary name http://google2.osuosl.org/wiki/. Feel free to dump your stuff on there. On Fri, Mar 13, 2009 at 7:43 PM, John Mosby <ojomojo at gmail.com> wrote: > Hi Evan, > Thanks very much for the review, I am

Jim/Tim/Renato, A few days ago (has it been weeks now?) we discussed a codegen problem on armv4t having to do with lo->lo register copies. I'd like to start that discussion again, this time with a patch. A brief summary of the problem for folks who didn't catch the discussion earlier, and those like me who forget what they ate for breakfast: ;] The mov instruction on armv4t

I am pretty sure the .cpp files always explicitly use "llvm" namespace. Look for: using namespace llvm; Is that sufficient? Evan On Nov 14, 2009, at 3:16 PM, Howard Hinnant wrote: > In many places there is code that looks like: > > MBBI = next(MBBI); > > In C++0X there is a std::next that is likely to be in scope when these > calls are made. And due to ADL

Hi, It seems to me that the TwoAddressInstructionPass::runOnMachineFunction method has some problems when the tied destination register has a subReg. The two changes below improves the situation for me but I'm all new to this so I'm not sure how it's supposed to work. I'm running on 2.9. Any comments? @@ -1172,12 +1172,20 @@ bool

There are 11 BuildMI() functions in MachineInstrBuilder.h including four using the iterator and one using an instruction. But I just don't think that's it. The creation of the new instruction works fine (works fine with OldMI as well) and the new instruction is present in the assembly output. The problem is removing the old instruction correctly. > The loop header needs to be

For my target, I handle incoming memory arguments by creating a store to memory (in LowerCall, [1]), then creating a fixed object on the stack and loading from it (in LowerFormalArguments[2]). This approach was based on MSP430. I now have the problem that the resulting loads in my output assembly are done assuming that the call stack looks something like: ------ MemArg ------ MemArg ------

Hi Evan, Thanks very much for the review, I am implementing your suggestions today and will have the next patch together this weekend. A few questions/comments: On Thu, Mar 12, 2009 at 10:05 AM, Evan Cheng <echeng at apple.com> wrote: > > 1. Some of the functions that you introduced, e.g. stringifyCSRegSet > probably ought to be "static" and ifdef'ed out when NDEBUG

Hi John, It looks pretty good. Thanks for working on this. Some comments: 1. Some of the functions that you introduced, e.g. stringifyCSRegSet probably ought to be "static" and ifdef'ed out when NDEBUG is defined. 2. + // DEBUG + if (! MBB->empty() && ! CSRUsed[MBB].intersects(restore)) { + MachineInstr* MI = BeforeI; + DOUT <<

I'm writing a peephole pass and I'm done with the X86_64 instruction level detail work. But I'm having difficulty with the basic block surgery of replacing the old MachineInst. The peephole pass gets called per MachineFunction and then iterates over each MachineBasicBlock and in turn over each MachineInst. When it finds an instruction which should be replaced, it builds a new