Displaying 20 results from an estimated 10000 matches similar to: "[LLVMdev] LTO question"
2014 Dec 15
4
[LLVMdev] LTO question
On Fri, Dec 12, 2014 at 1:59 PM, Diego Novillo <dnovillo at google.com> wrote:
> On 12/12/14 15:56, Adve, Vikram Sadanand wrote:
>>
>> I've been asked how LTO in LLVM compares to equivalent capabilities
>> in GCC. How do the two compare in terms of scalability? And
>> robustness for large applications?
>
>
> Neither GCC nor LLVM can handle our
2014 Dec 26
3
[LLVMdev] LTO question
(repost the reply using my personal account -- previous reply to the list
got hold up)
On Thu, Dec 25, 2014 at 11:55 PM, Adve, Vikram Sadanand
<vadve at illinois.edu> wrote:
> Diego, Teresa, David,
>
> Sorry for my delayed reply; I left for vacation right after sending my
message about this.
>
> Diego, it wasn't explicit from your message whether LLVM LTO can handle
2016 Jul 22
4
ThinLTO status in trunk?
First, kudos on the ThinLTO results reported in your blog post — they’re impressive and the system sounds really well engineered.
I’m starting to try it out on a large piece of software and I’d like to make sure I know what to expect. The blog said it will be available in clang-3.9 but both clang-3.8 and trunk seem to have some degree of support for it. What is the status of ThinLTO in 3.8
2016 Jul 22
3
ThinLTO status in trunk?
Hi Teresa,
Impressive results, indeed! (But no less is expected from an Itanium alumni... ;-))
One question, if you don't mind. In the blog post you wrote: "In a few cases ThinLTO even outperforms full LTO, most likely because the higher scalability of ThinLTO allows using a more aggressive backend optimization pipeline (similar to that of a non-LTO build)." Is it due to
2016 Jul 22
2
ThinLTO status in trunk?
> On Jul 22, 2016, at 12:36 PM, Teresa Johnson via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> Hi Vikram,
>
> Thanks!
>
> I'm not sure what part got committed in the 3.8 timeframe - it looks like that was released back in March?
3.8 was branched in early January though.
It has some of the work-in-progress for ThinLTO, it “could” work in simple cases I
2007 Nov 02
3
[LLVMdev] [Fwd: Fwd: LLVM and threading]
Dear All,
Here's a question Vikram and I received. Is the LLVM JIT thread safe?
-- John T.
-------------- next part --------------
An embedded message was scrubbed...
From: "Adve, Vikram Sadanand" <vadve at uiuc.edu>
Subject: Fwd: LLVM and threading
Date: Thu, 1 Nov 2007 09:48:59 -0500
Size: 3037
URL:
2011 Aug 15
8
[LLVMdev] Back ends for instructional use?
I'm trying to decide whether to use either the MIPS or ARM back ends for course projects in our introductory compiler class. I'd like to use something that has a stable back end, so that the students can use the selector, probably without changes, and do a project on register allocation and stack layout. We don't have MIPS or ARM hardware (other than possibly a few donated Android
2017 Sep 04
2
[RFC] Polly Status and Integration
On Mon, Sep 4, 2017, at 20:49, Hal Finkel via llvm-dev wrote:
> [tying to original thread]
>
> On 09/04/2017 01:37 PM, Adve, Vikram Sadanand via llvm-dev wrote:
> > Hal, Tobias, et al. –
> >
> > I am strongly in favor of seeing a broader range of loop transformations, supported by strong dependence analysis, added to LLVM, and the Polly infrastructure seems to be by far
2017 Jan 20
5
[RFC] IR-level Region Annotations
> On Jan 20, 2017, at 10:44 AM, Tian, Xinmin via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> Sanjoy, the IR would be like something below. It is ok to hoist alloca instruction outside the region. There are some small changes in optimizer to understand region-annotation intrinsic.
>
> { void main() {
> i32* val = alloca i32
> tok =
2017 Feb 01
2
[RFC] IR-level Region Annotations
In this case, inliner is educated to add all local variables to the tag of enclosing parallel region, if there is enclosing parallel region.
In our icc implementation, it is even simple, as we have routine level symbol table, the inliner adds ”private” attribute to those local variables w/o checking enclosing scope, the parallelizer does check and use it.
Xinmin
From: mehdi.amini at apple.com
2017 Feb 01
2
[RFC] IR-level Region Annotations
> On Jan 31, 2017, at 5:38 PM, Tian, Xinmin <xinmin.tian at intel.com> wrote:
>
>>>>> Ok, but this looks like a “workaround" for your specific use-case, I don’t see how it can scale as a model-agnostic and general-purpose region semantic.
>
> I would say it is a design trade-off.
I’m not sure if we’re talking about the same thing here: my understanding at
2017 Jan 20
9
[RFC] IR-level Region Annotations
Hi Sanjoy,
Yes, that's exactly what we have been looking at recently here, but the region tags seem to make it possible to express the control flow as well, so I think we could start with reg ions+metadata, as Hal and Xinmin proposed, and then figure out what needs to be first class instructions.
--Vikram Adve
> On Jan 19, 2017, at 11:03 PM, Sanjoy Das <sanjoy at
2017 Feb 01
2
[RFC] IR-level Region Annotations
From: mehdi.amini at apple.com [mailto:mehdi.amini at apple.com]
Sent: Tuesday, January 31, 2017 9:03 PM
To: Tian, Xinmin <xinmin.tian at intel.com>
Cc: Sanjoy Das <sanjoy at playingwithpointers.com>; Adve, Vikram Sadanand <vadve at illinois.edu>; llvm-dev at lists.llvm.org; llvm-dev-request at lists.llvm.org
Subject: Re: [llvm-dev] [RFC] IR-level Region Annotations
On Jan 31,
2017 Jan 21
2
[RFC] IR-level Region Annotations
> On Jan 20, 2017, at 11:17 AM, Tian, Xinmin <xinmin.tian at intel.com> wrote:
>
>>>>> This means that the optimizer has to be aware of it, I’m missing the magic here?
>
> This is one option.
>
> The another option is that, as I mentioned in our LLVM-HPC paper in our implementation. We have a "prepare phase for pre-privatization" can be invoked
2017 Feb 01
1
[RFC] IR-level Region Annotations
> On Jan 31, 2017, at 6:48 PM, Tian, Xinmin <xinmin.tian at intel.com> wrote:
>
> Let me try this.
>
> You can simply consider the prepare-phase (e.g. pre-privatization) were done in FE (actually a library can be used by multiple FEs at LLVM IR level), the region is run with 1 thread, region annotation (scope, single-entry-single-exit) as memory barrier conservatively
2017 Feb 01
0
[RFC] IR-level Region Annotations
> On Jan 31, 2017, at 7:53 PM, Tian, Xinmin <xinmin.tian at intel.com> wrote:
>
> In this case, inliner is educated to add all local variables to the tag of enclosing parallel region, if there is enclosing parallel region.
So isn’t it a good example that shows that your intrinsic *cannot* be opaque and that IR passes need to be modified to handle not only the IR-region
2017 Feb 01
0
[RFC] IR-level Region Annotations
Let me try this.
You can simply consider the prepare-phase (e.g. pre-privatization) were done in FE (actually a library can be used by multiple FEs at LLVM IR level), the region is run with 1 thread, region annotation (scope, single-entry-single-exit) as memory barrier conservatively for now (instead of checking individual memory dependency, aliasing via tags which is the actual
2017 Feb 01
2
[RFC] IR-level Region Annotations
> On Jan 31, 2017, at 10:59 PM, Tian, Xinmin <xinmin.tian at intel.com> wrote:
>
>
> <>
> From: mehdi.amini at apple.com <mailto:mehdi.amini at apple.com> [mailto:mehdi.amini at apple.com <mailto:mehdi.amini at apple.com>]
> Sent: Tuesday, January 31, 2017 9:03 PM
> To: Tian, Xinmin <xinmin.tian at intel.com <mailto:xinmin.tian at
2007 Jun 08
1
[LLVMdev] Fwd: PC Magazine
Our department outreach coordinator spotted this and forwarded it to
me. It's a lot of speculation but I thought many of you would be
interested.
--Vikram
http://www.cs.uiuc.edu/~vadve
http://llvm.org
Begin forwarded message:
> From: "Jennifer C La Montagne" <jsandone at uiuc.edu>
> Date: June 8, 2007 12:53:00 PM CDT
> To: "Vikram Sadanand Adve"
2017 Jan 20
3
[RFC] IR-level Region Annotations
Hi,
I'm going to club together some responses.
I agree that outlining function sub-bodies and passing in the function
pointers to said outlined bodies to OpenMP helpers lets us correctly
implement the semantics we need. However, unless I severely
misunderstood the thread, I thought the key idea was to move *away*
from that representation and towards a representation that _allows_