similar to: [LLVMdev] Mips's MicroMips ??

Hello Daniel, At the moment we are preparing the patch for disassembling microMIPS 16 bit instructions and it will be on Phabricator tomorrow or on Wednesday. Functionality is implemented in MipsDisassembler::getInstruction where first two bytes are read and decodeInstruction is called with DecoderTableMicroMips16 and only if it fails we read 4 bytes and call decodeInstruction with

I'm currently trying to get llvm-mc --disassemble working for the XCore backend. Up until recently there was no instruction encoding / decoding information on any of the XCore instructions so Im incrementally adding this information at the same time as adding tests for the disassembler. However I've run into a problem and I'm not sure of the best way to solve it. With some of the

Owen, As I recall, we had some similar issues with custom decoders needing to cooperate on ARM. Do you remember the details? -Jim On Dec 18, 2012, at 2:37 AM, Richard Osborne <richard at xmos.com> wrote: > I'm currently trying to get llvm-mc --disassemble working for the XCore backend. Up until recently there was no instruction encoding / decoding information on any of the XCore

Hello, I'm a starting user of R. I have installed R 1.9.1 and winedt 5.4 If I run the example from written with winedt. The summary command does not produce any output. It does when I repeat the command manualy in R. Can someone explain me what can be the problem? library(MASS) data(anorexia) anorex.1 <- glm(Postwt ~ Prewt + Treat + offset(Prewt), family =

Hi, I'm new to this list also I'm new to rsync. I'm looking to get working rsync on my server to synchronize updating rbl dns table. For testing, I installed rsync on two sun boxes running solaris 8, also on those boxes I'm running sshd2 ver.3.1. Also I setup rshell an both and is working. rsync is in search path. When I tried to copy (update) files, I'm getting error messages:

Hi all, Short version I get decoding conflicts during generation of disassembler tables for my modified PowerPC backend: 001100.......................... ................................ ADDIC 001100__________________________ E_LBZ 001100__________________________ Which methods can be used to resolve this kind of error? Long version: I'm trying to implement support for the PowerPC

Is it possible to assign the value of subtarget features using more complex expressions with code as opposed to using the mechanism that tablegen affords. For example, if Mips16 or Micro Mips is not present, then I want the subfeature "standard encoding". If I can't do this, then it requires me to write a more complex expression for the "standard encoding" expresions.

Hi, Sorry for the late report but I've only just found these issues. Llvm.org isn't working for me at the moment but I'll file tickets once it is. The issues are: 1. Almabench has some significant numerical differences and fails the reference check for some configs. I'm investigating this one at the moment but early indications are that it's a similar (but different)

Hi Rui, Rafael, You are reviewers of two MIPS related patches for LLD linker: - Handle cross-mode (regular <-> microMIPS) jumps https://reviews.llvm.org/D40147 - Multi-GOT implementation https://reviews.llvm.org/D31528 Both patches implement essential part of MIPS architecture. microMIPS is something like ARM Thumb. Multi-GOT support required to link any rather complex application

> > > clang+llvm-3.6.0-rc2-mipsel-linux-gnu.tar.xz > > > All clear for default options. > > > Still running for the other configs. > > > > I just had to kill Searching-dbl.simple and Packing-dbl.simple for the > > mips32 config which were at 65hrs and 15hrs real time respectively. This is > > far in excess of the 15,000s time limit that's

Hi all, I plan to deprecate the experimental microMIPS64R6 backend for the 5.0 release and remove it after the release. Currently there are no CPUs that use that particular sub-ISA which makes it difficult to justify the maintenance and parallel development effort. If there was a CPU design produced that did use microMIPS64R6, the backend could be restored from the archive. Any comments or

Dear Sirs, I have been given your e-mail address by Jeremy Allison. I would like to submit the following issue I have. You should also know I have been searching Internet for articles before and found that the behavior I wish you to help me with is quite common. The issue is the Samba 4 server integration into a Microsoft Windows network. I have done this and that configuration as particular

Hi all, I''ve more than one rails based applications on my machine. When I upgrade my gems (including rails), I usually have to upgrade each application to be able to continue developing/using it... But some of these web applications don''t need to be up to date. I would be happy enough with older version of rails for these applications (, or I don''t have time to fix

Dear, Where can I find wine programs for linux fedora core 5. Or how can I work with windows programs in linux fedora core Yours Jozef Vanhaverbeke Gemeenhof 61 B8501 Kortrijk Belgium Ps If possible answer in Dutch Email: jozefvanhaverbeke@skynet.be How can I make a network with one Linux fedora core 5 computer and two window xp computers -------------- next part

I'm implementing this ability to switch between mips16 and mips32 on a per function basis. One issue that I've run into is regarding the DAGToDAGIsel pass. We have a different subclass for mips16 and non mips16 ( conceivably later there could be a separate one for micromips). I need to run a different pass depending on whether it's mips16 or mips32. My initial plan was to create

Hi Daniel, I am on a vacation now till the Aug 3 but I can take a look at these problems. What is the most important? As to the issue #3 - do we need to keep compatibility with the old mips-mti-linux-gnu toolchain layout? Simon On Wed, Jul 29, 2015 at 1:08 PM, Daniel Sanders <Daniel.Sanders at imgtec.com> wrote: > The issues are: > > 1. Almabench has some significant

Hi, I'd like to propose the following patches for inclusion in Clang 3.5.1. Proposed clang patches: * r213769 - Fix test/Driver/cl-x86-flags.c by providing explicit -target * r214025 - [Driver][Mips] Check output of -dynamic-linker arguments by the Clang driver * r214662 - [Mips] Add the `mips64-linux-gnu` target to the test case to check `in128` type handling. *

Older targets like Mips had/have assemblers and ABIs that carry a lot of baggage. The small bit of baggage that is giving me fits is that MipsELFObjectWriter needs to know the relocation model (static,pic,cpic), whether we are using xgot (-mgot), which abi (old,new), which architecture (32r[123],64[123]), which if any coprocessor or extention instructions are used (mips16,micromips,etc.). I

The problem is that everything about the mips32 and micro mips 16 instruction is the same, aside from the encoding in to binary. Seems like maybe we need to extend the notion of an instruction so that it can have alternate encodings depending on subtarget. On 09/05/2012 08:28 PM, Jim Grosbach wrote: > The instructions are defined by their encodings, not the assembly syntax. You want

I believe I've identified the problem with almabench but I haven't found the root cause in the compiler yet. The problem is that a caller saved register ($f14) is being moved across a call and this call sometimes clobbers the value. As a result, the value of the TWOPI constant used in the fmod() calls isn't always 2*PI. According to -print-after-all, the pass that moves the