similar to: [LLVMdev] Autotuning parameters/heuristics within LLVM

Displaying 20 results from an estimated 2000 matches similar to: "[LLVMdev] Autotuning parameters/heuristics within LLVM"

2018 May 11
2
Query on unswitching + vectorization
Hi, I am going through analysis on unswitching + vectorization. For the below test, llvm unswitches successfully but fails to vectorize the loop after unswitching. Llvm bails out saying "Found an outside user" apparently which is the value of 'tmp'. int i, w, x[1000], y[1000],tmp; void fn() { for (i = 0; i < 1000; i++) { if (w==1) { y[i] = 1; tmp = i*2; }
2014 Apr 07
2
[LLVMdev] Loop unswitching creates dead code
Hi, I'm surprised by the result of compiling the following lines of code: for (int i = 0; i < RANDOM_CHUNKS; i++) { for (int j = 0; j < RANDOM_CHUNK_SIZE; j++) { random_text[i][j] = (int)(ran()*256); } } The problem happens when -fsanitize=undefined, -fno-sanitize-recover and -O3 are enabled. In this case, UndefinedBehaviorSanitizer inserts check for array index out of
2015 Jan 07
4
[LLVMdev] ARM disassembler
Hi, I am newbie for LLVM. I need some help, I want to disassemble ARM binaries and perform some operation on LLVM IR and again back to generate ARM binary from modified ARM LLVM IR. How I can proceed for the same. Any tool or document will be highly appreciated. Thanks and Regards, Deep -------------- next part -------------- An HTML attachment was scrubbed... URL:
2018 Apr 29
0
FYI, planning to enable nontrivial loop unswitch in the new PM at O3
Is there any written description of what "non trivialness" is there? On Sun, Apr 29, 2018, 2:49 PM Chandler Carruth via llvm-dev < llvm-dev at lists.llvm.org> wrote: > One of the last big missing pieces for the new PM is enabling non-trivial > loop unswitch at O3. > > The pass is now working well and passing all the testing I have done as > well as some others'
2018 May 11
0
Query on unswitching + vectorization
On 5/10/2018 10:44 PM, Gopalasubramanian, Ganesh via llvm-dev wrote: > > Hi, > > I am going through analysis on unswitching + vectorization. > > For the below test, llvm unswitches successfully but fails to > vectorize the loop after unswitching. > > Llvm bails out saying “Found an outside user” apparently which is the > value of ‘tmp’. > > int i, w, x[1000],
2018 Apr 29
2
FYI, planning to enable nontrivial loop unswitch in the new PM at O3
One of the last big missing pieces for the new PM is enabling non-trivial loop unswitch at O3. The pass is now working well and passing all the testing I have done as well as some others' testing (thanks Fedor!) so it should be ready to be enabled. I've done preliminary benchmarking on the test suite and SPEC and haven't seen any interesting regressions and quite a few improvements.
2017 Jul 17
2
A bug related with undef value when bootstrap MemorySSA.cpp
Cool, thanks for debugging this issue and letting us know. We have a few patches to fix this issue: - Introduce freeze in IR: https://reviews.llvm.org/D29011 - Lowering freeze: https://reviews.llvm.org/D29014 - Fix loop unswitch: https://reviews.llvm.org/D29015 Bonus patches to recover perf: - Be less conservative in loop unswitching: https://reviews.llvm.org/D29016 - Instcombine support
2017 Jul 17
2
A bug related with undef value when bootstrap MemorySSA.cpp
The issue blocks another optimization patch and Wei has spent huge amount of effort isolating the the bootstrap failure to this same problem. I agree with Wei that other developers may also get hit by the same issue and the cost of leaving this issue open for long can be very high to the community. David On Mon, Jul 17, 2017 at 10:01 AM, Wei Mi <wmi at google.com> wrote: > Sanjoy and
2015 Sep 04
9
[RFC] Refinement of convergent semantics
Hi all, In light of recent discussions regarding updating passes to respect convergent semantics, and whether or not it is sufficient for barriers, I would like to propose a change in convergent semantics that should resolve a lot of the identified problems regarding loop unrolling, loop unswitching, etc. Credit to John McCall for talking this over with me and seeding the core ideas. Today,
2017 Jul 18
4
A bug related with undef value when bootstrap MemorySSA.cpp
On Mon, Jul 17, 2017 at 5:11 PM, Wei Mi <wmi at google.com> wrote: > On Mon, Jul 17, 2017 at 2:09 PM, Sanjoy Das > <sanjoy at playingwithpointers.com> wrote: >> Hi, >> >> On Mon, Jul 17, 2017 at 1:56 PM, Daniel Berlin via llvm-dev >> <llvm-dev at lists.llvm.org> wrote: >>> >>> >>> On Mon, Jul 17, 2017 at 1:53 PM, Wei Mi
2015 Sep 14
2
[RFC] Refinement of convergent semantics
> On Sep 14, 2015, at 12:15 PM, Philip Reames <listmail at philipreames.com> wrote: > > On 09/04/2015 01:25 PM, Owen Anderson via llvm-dev wrote: >> Hi all, >> >> In light of recent discussions regarding updating passes to respect convergent semantics, and whether or not it is sufficient for barriers, I would like to propose a change in convergent semantics that
2020 Mar 16
2
GSoC Project - Advanced Heuristics and ML
Hello everybody. Last monday I sent an email to the LLVM dev mailing list saying that I was looking forward to working on these GSoC projects: *Advanced Heuristics for Ordering Compiler Optimization Passes* and *Machine learning and compiler optimizations: using inter-procedural analysis to select optimization* I currently do an undergraduate research on compiler autotuning of Rust code, more
2014 Feb 25
2
[LLVMdev] [GSoC 2014] Using LLVM as a code-generation backend for Valgrind
On 02/25/2014 04:50 PM, John Criswell wrote: > > I think a more interesting idea would be to use LLVM to perform > instrumentation and then to use Valgrind to instrument third-party > libraries linked into the program. > > What I'm imagining is this: Let's say you instrument a program with > SAFECode or Asan to find memory safety errors. When you run the program >
2017 Jul 16
2
A bug related with undef value when bootstrap MemorySSA.cpp
This is a bug found by internal compiler bootstrap, and possibly it is the root cause of https://bugs.llvm.org/show_bug.cgi?id=33652 and https://bugs.llvm.org/show_bug.cgi?id=33626. Here is the testcase 1.c. The original code is at MemorySSA.cpp:586 for rL307764. ------------------------- 1.c --------------------------- long a, c, d, e, f, m, cnt, i_hasval; volatile long b; void goo(long); void
2020 Mar 09
2
GSoC - Advanced Heuristics and Machine Learning
Hello again! Previously, I introduced myself as a prospective GSoC student interested in LLVM. Per Mr. Doerfert suggestion I took a look at two other projects that he said could interest me due to my ongoing research in autotuning. The projects are: Advanced Heuristics for Ordering Compiler Optimization Passes Machine learning and compiler optimizations: using inter-procedural analysis to select
2017 Jul 17
3
A bug related with undef value when bootstrap MemorySSA.cpp
Hi, On Mon, Jul 17, 2017 at 1:56 PM, Daniel Berlin via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > On Mon, Jul 17, 2017 at 1:53 PM, Wei Mi <wmi at google.com> wrote: >> >> It seems MemorySSA.cpp is the only real code where we found the >> problem happening. > > > This is doubtful, ¸FWIW :) > >> >> Is it possible to change the
2013 Jul 29
0
[LLVMdev] IR Passes and TargetTransformInfo: Straw Man
On 7/16/2013 11:38 PM, Andrew Trick wrote: > Since introducing the new TargetTransformInfo analysis, there has been some confusion over the role of target heuristics in IR passes. A few patches have led to interesting discussions. > > To centralize the discussion, until we get some documentation and better APIs in place, let me throw out an oversimplified Straw Man for a new pass pipline.
2017 Jul 18
2
A bug related with undef value when bootstrap MemorySSA.cpp
On 07/18/2017 06:03 PM, David Majnemer via llvm-dev wrote: > I doubt it is possible for us to try and make any fix which is > predicated on eagerly treating undef in a particular way, refinement > will always cause these problems to come about... > > Given what I've seen in LLVM (and what I've learned from other > compilers), we probably have two choices: > 1.
2018 May 14
1
Query on unswitching + vectorization
* Looks like some sort of pass ordering issue; it will vectorize if indvars runs sometime between loop unswitch and the vectorizer. That insight is helpful. I scheduled Canonicalization of induction variable before loop vectorization and could get the loop vectorized. The indvars are heavily dependent on SCEV. If there a scalar like tmp which is of real type, we may not be able to get the
2013 Jul 29
3
[LLVMdev] IR Passes and TargetTransformInfo: Straw Man
On Jul 29, 2013, at 9:05 AM, Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote: > On 7/16/2013 11:38 PM, Andrew Trick wrote: >> Since introducing the new TargetTransformInfo analysis, there has been some confusion over the role of target heuristics in IR passes. A few patches have led to interesting discussions. >> >> To centralize the discussion, until we get