Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] RAUW in shift-and reassociation during X86 ISel"
2016 Feb 04
2
llc gives Segmentation fault at instruction selection [was Re: Instruction selection gives "LLVM ERROR: Cannot select"]
Hello, Tim,
Thank you for your advice.
Indeed, the problem with "LLVM ERROR: Cannot select" was a false predicate that
should have been true. I solved the problem by simply making the C++ function implementing
the TableGen predicate used in my store instruction (very similar to the selectIntAddrMSA
predicate from the Mips back end) return true instead of false.
But
2018 Jul 30
2
Metadata RAUW
Hello,
Does anyone know if it is possible to RAUW the Metadata? I took a look at
the source for it and IIUC, it is not possible. What should I do to
implement the RAUW for DINode (more precisely DILocation)?
Thank you for your help,
Son Tuan Vu
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2015 May 21
2
[LLVMdev] [LLVM 3.6.0] Metadata/Value split and RAUW.
Hello everyone,
If I understand correctly after the Metadata/Value split the Metadata support of RAUW is limited by ValueAsMetadata and MDNodeFwdDecl (i.e. until cycled in MDNode are not resovled).
And my question is. Is where any way to replace an MDNode which is referenced by other MDNodes w\o iterating over all MDNodes in LLMVContext to find and replace those references? Unfortunately I
2018 Jan 18
1
LEAQ instruction path
Hi,
I've been trying to teach LLVM that pointers are 128-bit long, which
segfaults with some seemingly unrelated stacktrace when I try to take an
address of a variable. Since stack saving and loading seems to work fine, I
dare to assume the instruction causing problems there is leaq. Now I've
done a search for leaq of the entire LLVM codebase with no success and I'd
like to know which
2009 Mar 03
1
profiler and loops
Hello,
(This is follow up from this thread:
http://www.nabble.com/execution-time-of-.packages-td22304833.html but
with a different focus)
I am often confused by the result of the profiler, when a loop is
involved. Consider these two scripts:
script1:
Rprof( )
x <- numeric( )
for( i in 1:10000){
x <- c( x, rnorm(10) )
}
Rprof( NULL )
print( summaryRprof( ) )
script2:
2018 May 08
0
more reassociation in IR
1. The reassociate pass that exists right now was *originally* (AFAIK)
written to enable CSE/GVN to do better. That particular issue is solvable
in other ways, because there are good ways to integrate reassociation into
CSE/GVN (and at this point, it would probably be cheaper than -reassociate
since it would modify code less, only changing it when there are actual
redundancies )
I don't know
2015 Oct 01
2
Register Spill Caused by the Reassociation pass
Hi Sanjay,
I observed some extra register spills when applying the reassociation pass
on spec2006 benchmarks and I would like to listen to your advice.
For example, function get_new_point_on_quad() of tria_boundary.cc in
spec2006/dealII has a sequences of code like this
.
X=a+b
.
Y=X+c
.
Z=Y+d
.
There are many other instructions between these float adds. The
reassociation
2018 May 08
0
more reassociation in IR
(
I came across this issue in the context of
D46336 <https://reviews.llvm.org/D46336>.
Thanks, Sanjay, for starting this discussion.)
If
we will
move
reassociation,
or keep additional ones
,
out of instcombine,
open questions for me would be
:
1. Since -reassociate isn't a fixed point pass, we might need to repeat
"-instcombine -reassociate" multiple times to
2018 May 09
0
more reassociation in IR
My 5 cent, since i've been recently working on instcombine a bit.
First of all, I do acknowledge and recognize the problem at hand -
the IR is not getting fully optimized. I think that should be solved.
As it is evident, LLVM is quite modular, there are separate passes.
This is good. It allows to test things separately. Unfortunately, that
is also bad, because there are always these things
2018 May 09
0
more reassociation in IR
On Tue, May 8, 2018 at 11:15 AM Daniel Berlin <dberlin at dberlin.org> wrote:
>
>
> On Tue, May 8, 2018 at 10:38 AM, Hiroshi Yamauchi via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
>> (
>> I came across this issue in the context of
>> D46336 <https://reviews.llvm.org/D46336>.
>>
>> Thanks, Sanjay, for starting this
2009 Jul 26
2
[LLVMdev] question about llvm.powi and reassociation
Hello, all. To get my feet wet and hopefully make a small contribution, I
was looking for something small to start with. I settled on one of the
suggestions from the CodeGen readme:
> Reassociate should turn things like:
>
> int factorial(int X) {
> return X*X*X*X*X*X*X*X;
> }
>
> into llvm.powi calls, allowing the code generator to
> produce balanced multiplication
2018 May 09
0
more reassociation in IR
When you say that distribution shouldn't be used, do you mean within
instcombine rather than some other pass? Or not all as an IR optimization?
A dedicated optimization pass that looks for and makes
factoring/distribution folds to eliminate instructions seems like it would
solve the problems that I'm seeing.
Ie, I'm leaning towards the proposal here: https://reviews.llvm.org/D41574
2018 May 08
4
more reassociation in IR
There are at least 3 active proposals to add reassociative optimizations in
IR:
[1] D41574 <https://reviews.llvm.org/D41574>- a new pass for
reassociation/factoring
[2] D46336 <https://reviews.llvm.org/D46336> - enhance -instcombine to do
more reassociation/factoring
[3] D45842 <https://reviews.llvm.org/D45842> - add to the existing
-reassociate pass to enable factoring
2018 May 08
2
more reassociation in IR
On Tue, May 8, 2018 at 10:38 AM, Hiroshi Yamauchi via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> (
> I came across this issue in the context of
> D46336 <https://reviews.llvm.org/D46336>.
>
> Thanks, Sanjay, for starting this discussion.)
>
> If
> we will
> move
> reassociation,
> or keep additional ones
> ,
> out of instcombine,
2019 Nov 10
2
Reassociation is blocking a vectorization
Hi Devs,
I am looking at the bug
https://bugs.llvm.org/show_bug.cgi?id=43953
and found that following piece of ir
%arrayidx = getelementptr inbounds float, float* %Vec0, i64 %idxprom
%0 = load float, float* %arrayidx, align 4, !tbaa !2
%arrayidx2 = getelementptr inbounds float, float* %Vec1, i64 %idxprom
%1 = load float, float* %arrayidx2, align 4, !tbaa !2
%sub = fsub fast float %0, %1
2018 May 10
0
more reassociation in IR
On Wed, May 9, 2018 at 8:24 PM Daniel Berlin <dberlin at dberlin.org> wrote:
>
>
> On Wed, May 9, 2018 at 10:39 AM, Hiroshi Yamauchi <yamauchi at google.com>
> wrote:
>
>>
>>
>> On Tue, May 8, 2018 at 11:15 AM Daniel Berlin <dberlin at dberlin.org>
>> wrote:
>>
>>>
>>>
>>> On Tue, May 8, 2018 at 10:38 AM,
2018 May 10
2
more reassociation in IR
On Wed, May 9, 2018 at 10:39 AM, Hiroshi Yamauchi <yamauchi at google.com>
wrote:
>
>
> On Tue, May 8, 2018 at 11:15 AM Daniel Berlin <dberlin at dberlin.org> wrote:
>
>>
>>
>> On Tue, May 8, 2018 at 10:38 AM, Hiroshi Yamauchi via llvm-dev <
>> llvm-dev at lists.llvm.org> wrote:
>>
>>> (
>>> I came across this issue in
2015 Oct 02
2
Register Spill Caused by the Reassociation pass
This conflict is with many optimizations incl. copy prop, coalescing, hoisting etc. Each could increase register pressure and with similar impact. Attempts to control the register pressure locally (within an optimization pass) tend to get hard to tune and maintain. Would it be a better way to describe eg in metadata how to undo an optimization? Optimizations that attempt to reduce pressure like
2018 May 09
4
more reassociation in IR
> On May 8, 2018, at 9:50 AM, Daniel Berlin via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> 1. The reassociate pass that exists right now was *originally* (AFAIK) written to enable CSE/GVN to do better.
Agreed. The original mindset included a (naive) belief that going with a canonical form was better than teaching redundancy elimination to handle abstractions (as a matter
2018 May 11
0
more reassociation in IR
On Thu, May 10, 2018 at 12:49 PM Daniel Berlin <dberlin at dberlin.org> wrote:
>
>
> On Thu, May 10, 2018 at 12:05 PM, Hiroshi Yamauchi <yamauchi at google.com>
> wrote:
>
>>
>>
>> On Wed, May 9, 2018 at 8:24 PM Daniel Berlin <dberlin at dberlin.org> wrote:
>>
>>>
>>>
>>> On Wed, May 9, 2018 at 10:39 AM, Hiroshi