similar to: [LLVMdev] Need guidance regarding MachineFunctionPass implementation

Hello, I am writing a MachineFunctionPass that inspects the generated machine code, and examines each opcode and its corresponding operands. If the 'instruction + operands' match a particular sequence, then the pass should replace them with a fixed instruction + operands sequence. I tried using MachineInstr's getOpcode and getOperand functions but the pass didn't work as expected.

Thank you Mr. Tim. I was wondering if you can tell me in which file 'get()' is defined. I am having trouble using this function. For example if I write 'get(AArch64::LDRXui)' then there is an error generated which says: use of undeclared identifier 'get'. Thanks again !! On Fri, Oct 3, 2014 at 9:56 PM, Tim Northover <t.p.northover at gmail.com> wrote: > Hi

Thank you Mr. Tim. Is "AArch64" a namespace? Because when I tried "X86::MOV", it gave me an error saying that first define X86 namespace. Sorry if I sound stupid but I am new to LLVM. Thank you again. On Thu, Oct 2, 2014 at 8:16 PM, Tim Northover <t.p.northover at gmail.com> wrote: > Hi Sachin, > > > int op = mi->getOpcode(); > > This is

Respected Dr. Criswell, My problem is that the output of following code looks nothing like any opcode: *for(MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) { MachineInstr *mi = I; int op = mi->getOpcode(); std::cout << op << '\t'; }* I need to identify specific instructions in my MachineFunctionPass and I was hoping that I can

Hello all, I am new to llvm. I need to make some changes to the LR. The backend should modify the LR, but only after all the normal work and all the optimizations are done. Just before outputting the native code, LR is modified. I was wondering if I should implement the whole backend in order to achieve this or is it possible to implement a new pass and use that. Thanks ! Regards, Sachin

Hello, I have built llvm with some added Machine Function Passes and I am trying to use it to build the SPEC CPU2006 benchmarks. I am using llvm test-suite to build the benchmarks. I configured the test-suite with "--with-f2c" but still none of the fortran benchmarks are built or compiled. I tried running simple and nightly tests. Kindly let me know if I am missing some steps and if not

Deer All, I wanted to write MachineFunctionPass which needs to be run after global register allocation pass. I have read LLVM documentation and blogs and able to write simple pass which will is invoked through opt command line. However, I could able to find any blogs or document to explains clear steps for writing MachineFunctionPass. Please suggest some documents or blogs which will help me

Hello everyone, I have written simple LLVM passes, but I cannot able to write a MachineFunctionPass pass. I am following the steps form the following link but it is not working: http://www.gabriel.urdhr.fr/2014/09/26/adding-a-llvm-pass/ Please share the sample MachineFunctionPass code or steps to follow to write MachineFunctionPass. Thanks, Bala -- Thanks, Bala IIITA Allahabad --------------

Hello, I want to add a global variable of arrayType in my MachineFunctionPass. However, I only get const Module from MachineFunction.getMMI().getModule(). I can't add any global variable to a const Module. Another way is to add a global variable in doInitialization in my MachineFunctionPass, but I can't determine the size of my arrayType for global variable in doInitialization. Is there

Hello everyone, I have written several complex passes till now, but I cannot write a MachineFunctionPass pass. It just gives me segfault. Hence I reduced the pass to the following form : using namespace llvm; namespace { class CFGexplorator : public MachineFunctionPass { public: static char ID; // Pass identification, replacement for typeid CFGexplorator() : MachineFunctionPass(ID)

I found that : "Code generator passes are registered and initialized specially by TargetMachine::addPassesToEmitFile and similar routines, so they cannot generally be run from the *opt* or *bugpoint* commands."...So how I can run a MachineFunctionPass? In the end, I just want to apply a DFS on a CFG of a function. And I need oriented edges and wanted to use

Antony, What are you trying to accomplish in this case? I did something very similar in the AMDIL backend, but it was not the cleanest solution and you are correct it has to be do at doInitialization stage and not at runOnMachineFunction. Micah > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Antony Yu > Sent:

First you should learn how to write a pass and then a MachineFunctionPass. >From LLVM website, you can refer to http://llvm.org/docs/WritingAnLLVMPass.html And for outside pass, you can refer to http://adriansampson.net/blog/llvm.html It's a great article. And the author put the source code on Github <https://github.com/sampsyo/llvm-pass-skeleton>. 2016-03-01 14:36 GMT+08:00

Can you tell us a bit more about what you're trying to accomplish? Changes to the IR performed during MachineFunctionPass::doInitialization will likely propagate down through code generation, but at that point what is the purpose of using a MachineFunctionPass? You won't have any analysis or instruction information available until runOnMachineFunction. On Mon, Aug 5, 2013 at 12:00 PM,

Micah, As you expected, I am trying to create local memory but in the NVPTX backend. It's really not convenient that I can't create local memory in runOnMachineFunction. Hmm.... Since I should do it at doInitialization stage, I also need to do some tricks in global variable and AsmPrinter to resize it. Did you use the similar way? Antony 2013/8/5 Micah Villmow <micah.villmow at

Micah, Thanks for your help. I will study on that code. Justin, Sorry for my misleading word. Local memory in OpenCL is the same as share memory in CUDA. What I mean is share memory, so MachineFrameInfo is not suitable to me. And I need codegen data, so FunctionPass is also not suitable. Anyway, thanks for the suggestion. Antony 2013/8/5 Justin Holewinski <justin.holewinski at

If you're running a MachineFunctionPass, then the code has already been lowered to machine instructions and modifying the original IR will most likely not do what you want. You should only be using the IR as an immutable object for reference. If you want to change the IR, I would suggest using a FunctionPass instead of a MachineFunctionPass. Unless you need codegen data. At the

Yes, global variables are the only way to access shared memory. I'm just trying to get an idea of what you're aiming to accomplish to see if we can improve on the interface here. A MachineFunctionPass runs after instruction selection and relying on doInitialization to run before instruction selection is an implementation detail that I do not believe is guaranteed anywhere (I could be

I want to create share memory in my MachineFunctionPass, and insert load/store instruction for it. The way to create share memory is to add global variables which are in share memory address space (not sure if it is the only way). Therefore, I should add global variables in fixed size in doInitialization, and record its real size in other place like MachineModuleInfo. Then modify or query its real

Is there any way you could approximate the register/instruction usage and perform live-range analysis in a higher-level LLVM IR pass? I'm not sure how useful NVPTXRegisterInfo would be anyway. Unlike backends that target "real" ISAs, these structures do not contain any special properties about registers or instructions, like cost or scheduling information. Are you trying to figure