similar to: [LLVMdev] Guidance regarding a dummy project

Dear, Can anybody comment on inserting inline assembly in LLVM IR? -- Pratik -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140620/03400e95/attachment.html>

Dear, I am looking at the Instructions defined in the XXXXInstrInfo.td where I can see a def record defined like below def ADD8rr : I8rr<0x0, (outs GR8:$dst), (ins GR8:$src, GR8:$src2), "add.b\t{$src2, $dst}", [(set GR8:$dst, (*add *GR8:$src, GR8:$src2)), (implicit SRW)]>; Now here I would like the to

Dear, I am currently working on one specific architecture. When I make changes and try to "make" it takes a very long time as It compiles all the files in the source. My question is since I am only editing a few files in the architecture directory and some files in include directory, Can I speed up my "make" by running "make" only for a few files? Can such changes

Dear, I have the following problem. I am given 2 instructions say I1 and I2 whose selection should depend on the operands. Say the operands have a boolean attribute 'attr'. I would like to select I1 and I2 by some logic that involves the 'attr' attribute of all the operands involved. eg: If all operands have attr set to True, I want I1 to be selected to operate else I2. How can I

Dear, I am new to llvm and hence have very little idea about a problem that is my university project. I am supposed to assume a X86 CPU supporting an instruction ADDenc that adds two encrypted operands. The original ADD also exists and should operate on unencrypted operands. My task is to transform C programs into the new X86 assembly that supports ADDenc. I have very little idea about this. I

I want to have a field in model, which I''m not storing in a database. And I want to do something like the following in the model code : validates_format_of :field_NOT_in_db, :with => session[:field] How can I do it ? Thanks, Pratik -- rm -rf / 2>/dev/null - http://null.in

Dear, I have been going through the Targets registered with llvm. As I was looking around, I found an include statement in the file XXXRegisterInfo.h (XXX is any target), #include "llvm/Target/TargetRegisterInfo.h" The question is there is no folder called Target in my llvm directory (file TargetRegistorInfo.h missing ) and still programs compile in the XXX architecture. I want access

Hi - attached is a patch to enable building DragonEgg (x86_64) for LLVM3.3 and LLVM3.4. That is, add these changes to the 3.3 release, and it becomes possible to build DragonEgg against a llvm3.4 compiler. Regards, Richard Gorton Cognitive Electronics rcgorton at cog-e.com ---------- -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name:

Dear Tim, Thank you for replying back. I could find the file. But when I try running tblgen on one of the .td's which has such an include statement I get "file not found error" eg: llvm-tblgen X86.td gives file not found where X86.td has an include statement namely "include "llvm\Target\Target.td". Can you please clear this too? Regards, Pratik On Mon, Jun 9,

Hi, I'm stumped by how to handle fpowi. Here is the context: my architecture has i64, f32, and f64 registers. No i32. For calls & returns, we promote i32 to i64. There is no support in the architecture to perform fpowi - it has to go through the runtime. I'm using gfortran + dragonegg + llvm3.4 to generate .ll files via plugin. The fortran expression REAL = REAL ** INTEGER*4

Thank You. On Fri, Jul 7, 2017 at 10:03 AM, Craig Topper <craig.topper at gmail.com> wrote: > Yes, that error is from instruction selection. I think your legalization > changes worked fine. > > ~Craig > > On Thu, Jul 6, 2017 at 8:21 PM, hameeza ahmed via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> also i further run the following command;

Hi LLVM developers, As one of the maintainers of AVR target, I want to update WritingAnLLVMBackend document to be familiar with the development of backend, because: 1. The structure of LLVMTargetMachine https://github.com/llvm-mirror/llvm/blob/master/docs/WritingAnLLVMBackend.rst#target-machine has been changed a lot! 2. LLVMInitializeSparcTargetInfo

Can you guys post a demo of your application ? Would be great. Thanks, Pratik -- rm -rf / 2>/dev/null - http://null.in

I''m sorry - just couldn''t come up with a subject that describes the problem :( Anyway, this is my problem. I have a long list of fields that need to be displayed when a ''show'' is requested on the controller. I''m now doing the list.rhtml and looking for a DRY way to do the following. For each data item, I have 2 fields - one is the item name, the

I''m having a class called Person, with subclasses as goalkeeper, forward, defender. Now a person can be a forward as well as a defender or a goalkeeper. I want to use single table inheritance like : class Goalkeepr < Person end And not have multiple boolean columns like in my people table like is is_goalkpeer, is_forward, is_defender. How do I go about it ? Thanks, Pratik -- rm

Is there a way by which I can do form validation for form generated by In Place Editting of scritaculous? The reason is, I want to avoid server roundtrip for checks which I can perform at browser. Regards, Jatinder -------------- next part -------------- An HTML attachment was scrubbed... URL: http://wrath.rubyonrails.org/pipermail/rails/attachments/20060828/ca882668/attachment-0001.html

I''m trying to setup my rails application with Light+fcgi. This is the error I''m getting when I try to start Lighttpd : ============ [getcapture@alpha getcapture]$ ~/etc/rc.d/lighttpd.sh start Starting Lighttpd 2006-04-15 11:27:24: (mod_fastcgi.c.1022) execve failed for: /home/getcapture/application/public/dispatch.fcgi No such file or directory [getcapture@alpha getcapture]$

Hi folks, I have following in my view : =================== <div class="foo"> <%= select ''theme'', "id", Theme.find_all.collect {|t| [ t.name, t.id ] }, { :prompt => ''Select a theme'' } %> </div> <%= observe_field( :theme_id, :update => :my_style, :url => { :action => :themelookup, :id => @space,},

Hello all, I need to modify llvm bytecode / native code just before it is emitted i.e. after all the regular operations and optimizations are done. I was told that this can be achieved by implementing a MachineFunctionPass. I searched the internet for some tutorials or some example MachineFunctionPass but found nothing. Kindly point some links, or anything that may help. Thank you. Regards,

I want to use LLVM as the main component in my compilation process. In doing so, I know I need to convert a high-level language to another language (python or a custom syntax.) The architecture I'm targeting is non-traditional hardware: microfluidic devices. Microfluidic devices are a specific class of reconfigurable computing; which don't necessarily adhere to a traditional