similar to: [LLVMdev] comparing .o files from different build trees

Displaying 20 results from an estimated 4000 matches similar to: "[LLVMdev] comparing .o files from different build trees"

2014 Apr 04
2
[LLVMdev] successful full recurse of mips32
We have NFS mounted drives. I first build an clang/llvm hosted compiler for Mips linux using the clang/llvm linux x86 compiler. Call this clang1. then in directory recurse on Mips host, I place this clang1 compiler and build clang2. then i rename recurse to recurse1 and create a new recurse directory. in recurse I copy clang2 from recurse1 to a recurse but name it clang1. then i build
2019 Apr 30
6
Disk space and RAM requirements in docs
Hi, Have anybody recently built LLVM in Debug mode /within/ space requirements from the Getting Started doc? https://llvm.org/docs/GettingStarted.html#hardware > An LLVM-only build will need about 1-3 GB of space. A full build of LLVM and Clang will need around 15-20 GB of disk space. From my experience this numbers looks drastically low. On FreeBSD my recent builds consumed more than
2014 Mar 27
5
[LLVMdev] using just llvm/clang for building mips llvm
In case anyone is interested.... We don't need to compile llvm/clang using gcc anymore for the building of mips hosted llvm compilers. We build a linux mips hosted compiler starting with llvm/clang on x86 linux using the normal configure scripts and then can use that resulting compiler to build further llvm/clang native compilers on the mips linux host. The cross compiler and native
2013 May 16
5
[LLVMdev] Test failures
Hi, Two days ago, the test suite started failing. Initially there were hundreds of failing tests; now only seven remain. They appear to be related to SystemZ. Here's the last failed test: ******************** FAIL: LLVM :: MC/Disassembler/SystemZ/unmapped.txt (11484 of 14435) ******************** TEST 'LLVM :: MC/Disassembler/SystemZ/unmapped.txt' FAILED ******************** Script:
2014 Mar 27
2
[LLVMdev] using just llvm/clang for building mips llvm
Geting a seg fault. Have not investigted the cause. rkotler at mipsswbrd002:~/richard$ tar vfxz ~/Downloads/ellcc-mips-linux-2014-Mar-24-07-32-26.tgz rkotler at mipsswbrd002:~/richard/ellcc/bin$ gdb ./ecc GNU gdb (GDB) 7.4.1-debian Copyright (C) 2012 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html> This is free software: you are
2016 Nov 16
2
[RFC] AAP Backend
Hi all, I have just updated most of the patches to roll them forwards to LLVM top-of-tree, and incorporated various suggested changes. We're still looking for reviewers, if anyone is interested. Thank you, Edward Jones On 15/09/16 17:12, Ed Jones wrote: > I have now posted the final two patches for the backend to add > Disassembler support, ISel and CodeGen. The full list of patches
2016 Aug 18
4
[RFC] AAP Backend
Hi Renato, Currently I am building a set of patches which will add AAP piece-wise. I'm following the approach that AVR (and now RISC-V), and the patches I plan on adding are as follows: * Target triple * ELF definition * Basic skeleton with the required build system changes (targetinfo + target machine) * Instruction + Register tablegen * MC layer support * AsmParser * InstPrinter *
2015 Jul 29
1
[LLVMdev] Error when i am using command make -j4 command in cygwin to compile safecode
llvm[4]: Compiling PoolAllocate.cpp for Release+Asserts build /home/NIKHILREDDY/WORK/LLVM_SRC/projects/poolalloc/lib/PoolAllocate/PoolAllocate.cpp: In member function ‘virtual bool llvm::PoolAllocate::runOnModule(llvm::Module&)’: /home/NIKHILREDDY/WORK/LLVM_SRC/projects/poolalloc/lib/PoolAllocate/PoolAllocate.cpp:403:16: error: ‘class llvm::Constant’ has no member named
2013 May 16
0
[LLVMdev] Test failures
Csaba Raduly <rcsaba at gmail.com> wrote: > error: no disassembler for target s390x--linux-gnu The SystemZ disassembler was only recently added. To process major changes to the source tree like the addition of a completely new component, it seems to be necessary to explicitly re-run configure (or sometimes even remove the build directory completely and start from scratch). I've
2013 Oct 10
0
[LLVMdev] [PATCH] R600/SI: Embed disassembly in ELF object
On Wed, Oct 09, 2013 at 08:06:42PM -0500, Jay Cornwall wrote: > Hi, > > This patch adds R600/SI disassembly text to compiled object files, when > a code dump is requested, to assist debugging in Mesa clients. > > Here's an example of the output in a Mesa client with a corresponding > patch and RADEON_DUMP_SHADERS set: > > Shader Disassembly: > >
2014 Mar 12
3
[LLVMdev] dot release for 3.4
We are starting to move to using llvm/clang x86 as the starting point for mips native compilers. It's important to make sure that gcc cross compilers can do this too but sometimes there are issues there; especially now as c++11 is moving into the foreground. We are working to also make sure this works. As 3.5 llvm is probably around the corner; our use of clang/llvm for this starting
2015 Feb 17
3
[LLVMdev] New idea thoughts: Optimization passes have callbacks to identify changes made to IR
Hello, I'm currently developing a tool based on LLVM to understand how the LLVM IR changes after optimization passes are run. Today it's a tedious but automatic process at a function level in my language, where I first dump the IR before running any passes, and then do it for the 10 or so passes I care about one-at-a-time to understand which pass affected the change. There are two
2015 Aug 20
2
Problem Compiling AsmParser
Hi all, I am trying to compile with a minimal TestAsmParser class, but I get the following error. ---------------- [43/780] Linking CXX executable bin/llvm-mc FAILED: : && /usr/bin/c++ -fPIC -fvisibility-inlines-hidden -Wall -W -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wno-maybe-uninitialized -Wno-comment -std=c++11
2014 Jun 26
2
[LLVMdev] problem with X86's AVX assembler?
On Thu, Jun 26, 2014 at 10:23 AM, Adam Nemet <anemet at apple.com> wrote: > > > On Jun 25, 2014, at 7:05 PM, Jun Koi <junkoi2004 at gmail.com> wrote: > > > > > On Thu, Jun 26, 2014 at 5:47 AM, Adam Nemet <anemet at apple.com> wrote: > >> Hi Jun, >> >> On Jun 25, 2014, at 8:14 AM, Jun Koi <junkoi2004 at gmail.com> wrote: >>
2014 Mar 07
3
[LLVMdev] [RFC] Add second "failure" AtomicOrdering to cmpxchg instruction
Hi all, The C++11 (& C11) compare_exchange functions with explicit memory order allow you to specify two sets of semantics, one for when the exchange actually happens and one for when it fails. Unfortunately, at the moment the LLVM IR "cmpxchg" instruction only has one ordering, which means we get sub-optimal codegen. This probably affects all architectures which use
2013 Sep 17
0
[LLVMdev] [patch] alias instruction for Intel syntax
this patch prints out alias instruction for Intel sytax in diasm code. thanks. Jun diff --git a/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp b/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp index e7e7b15..b9f78a5 100644 --- a/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp +++ b/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp @@ -39,7 +39,8 @@ void
2015 Mar 09
2
[LLVMdev] Out of tree targets
I believe we'd need LLVMBuild.txt even in autoconf build - for bunch of autogenerated stuff, e.g. list of all asmprinters / asmparsers / InitializeAllTargetInfos, etc., since targets are not autoregistered anymore. On Mon, Mar 9, 2015 at 7:20 PM, Eric Christopher <echristo at gmail.com> wrote: > Hi Neil, > > Weird, I'd think the cmake build should probably do something
2011 Jul 06
0
[LLVMdev] MCInstPrinter::printRegName
I have a question regarding implementation of subclasses of MCInstPrinter. I am implementing Machine IR layer to MC layer lowering for Mips. What's the best way to print the value of "Register" in the following code in MCAsmStreamer::EmitRegisterName? Do I have to convert the LLVM register number back to its corresponding dwarf register number in function
2013 Oct 03
0
[LLVMdev] Question about PseudoInstExpansion
I am trying to do the following pseudo-to-real instruction conversion: PseudoMFHI GPR32:$rd, ACC64:$ac -> MFHI GPR32:$rd Is there a way to tell the assembler, disassembler and instprinter to ignore the ACC64:$ac operand? I know I can use PseudoInstExpansion to accomplish this, but I just thought it would be convenient to have a flag for this, something like flag "DisableEncoding".
2013 Apr 14
1
[LLVMdev] [RFC/PATCH][1/4] New SystemZ backend: LLVM code changes
Hello, this set of patches adds SystemZ support to base LLVM. This is split up into three patches just to simplify review; they should be committed as a single change if approved. The first patch adds SystemZ support to the configure logic and support for the systemz Triple. This ought to be straightfoward. The second patch adds changes to LLVM common code required to support the SystemZ ELF