Displaying 20 results from an estimated 60 matches similar to: "[LLVMdev] Disable JIT and interpret code instead in VMKit"
2014 Apr 01
2
[LLVMdev] Construction of SCEVAddRecExpr
Hello,
I'm studying how the SCEV analyzis works and how to use it and I could not create an example where the SCEV analyzis identifies an expression as "SCEVAddRecExpr".
Aren't the expressions below the kind of pattern that should be represented as a "AddRecExpr" ?
SCEV: (1 + (2 * %3)
or
SCEV: (%1 + (2 * %3)
or
SCEV: (%1 + (%2 * %3)
In my experiments they are
2014 Mar 31
2
[LLVMdev] vmkit build failure of lots of "undefined reference"
Hi,
I got lots of "undefined reference" when building vmkit. Anyone can help to give a solution?
I download vmkit with "svn co http://llvm.org/svn/llvm-project/vmkit/trunk/",
followed the instructions of "http://llvm.org/svn/llvm-project/vmkit/trunk/README.TXT", and built vmkit on ubuntu 13.10 x64 with sunjava 1.6.0_45 + llvm 3.3 + classpath 0.99 + gcc 4.8.1.
2014 Mar 31
0
CTR mode
On Mon, Mar 31, 2014 at 08:40:26AM -0700, no_spam_98 at yahoo.com wrote:
> OpenSSH uses its own CTR mode implementation, correct? ?I seem to
> recall some discussion about why it hasn't/won't switch over to using
> OpenSSL's implementation, but I can't find the thread anymore.
>
> So... why doesn't OpenSSH use OpenSSL's CTR mode implementation?
I believe as
2014 Mar 31
1
Function REGEX
Hi
I need help to use the function REGEX. My question is if is possible test a
expression as [X123 == 5123] ( If an extension corresponding to a
previously defined regular expression). I saw various examples about this
function, but nothing as the my needs. I do not understanding exactly how
to works this function.
Thank's
Att,
*Rafael dos Santos Saraiva*
2014 Mar 31
3
[LLVMdev] Contributing the Apple ARM64 compiler backend
> *nod*. That's most of what we needed for ARM as well. Should probably
> conditionalize it on os darwin for now until it's tested more with a
> command line?
I'd almost prefer to leave it in for the bugs to be discovered
(perhaps after some simple tests of our own). ARM went wirthout
FastISel support on Linux for years simply because it was declared
Darwin-only.
Tim.
2014 Mar 27
2
[LLVMdev] IR Line Number
Is there a way to print the IR (file) line number of a arbitrary llvm instruction?
I'm debugging an analysis pass and it would help a lot if I could exactly identify which instruction I'm outputting information about on the screen.
Thanks.
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2014 Mar 31
2
[LLVMdev] registerSize on X86 confused?
Hi,
In file X86DisassemblerDecoder.c, we have function readPrefixes() with
below code:
.....
} else if (insn->mode == MODE_32BIT) {
insn->registerSize = (hasOpSize ? 2 : 4);
insn->addressSize = (hasAdSize ? 2 : 4);
insn->displacementSize = (hasAdSize ? 2 : 4);
insn->immediateSize = (hasOpSize ? 2 : 4);
}
....
This is confused to me: so we
2014 Mar 31
3
CTR mode
OpenSSH uses its own CTR mode implementation, correct? ?I seem to recall some discussion about why it hasn't/won't switch over to using OpenSSL's implementation, but I can't find the thread anymore.
So... why doesn't OpenSSH use OpenSSL's CTR mode implementation?
Thanks.
2014 Mar 31
1
SSH_PRIVSEP_USER configurable at runtime?
Hi,
Right now, the unprivileged account for privilege separation is only
configurable at compile time (SSH_PRIVSEP_USER). I'd like to ask if it
would be acceptable to have the account runtime configurable by adding
something like
PrivilegeSeparationAccount foo
to sshd_config.
The reason I'm asking is this. I'm working on a long overdue change to
Cygwin which is supposed to get
2014 Mar 31
3
[LLVMdev] Can WriteBitcodeToFile be parallelized?
This function (understandably) takes quite a long time, because it has
to go through each function in module and write its binary.
But it probably can be parallelized if different threads would write
binaries separately, and then merge them together.
Is this implemented or planned?
Yuri
2014 Mar 31
2
[LLVMdev] Which function executing VMKit's llvm-IR
Hi All
I am trying to trace the execution path of J3 jvm with input of
java byte code . Once java byte codes compiled in to llvm IR it will be
passed to VMKit for store them . I couldn't find out which function is
getting this Jitted output from *Functioncache* and executing them ?
because , VMKit doesn't have an implementation of llvm Executionengine's
*runFunction*
2014 Apr 01
3
[LLVMdev] Pre-Built Mac OS X binaries for LLVM 3.4?
Hi Guys,
Where are the pre-built binaries of LLVM 3.4 for Mac OS X? This is the
first release I've seen of LLVM that doesn't include a download link via
the downloads page for a Mac OS X binary.
Can someone please put it up?
Thanks.
-Jared
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2014 Mar 28
3
[LLVMdev] Contributing the Apple ARM64 compiler backend
On Mar 28, 2014, at 4:23 PM, Bob Wilson <bob.wilson at apple.com> wrote:
>
> On Mar 28, 2014, at 4:17 PM, Chris Lattner <clattner at apple.com> wrote:
>
>> On Mar 28, 2014, at 3:32 PM, Bob Wilson <bob.wilson at apple.com> wrote:
>>> There are new conflicts several times a day, on average. I rebased them on Wednesday on top of svn 204791. If you want to
2014 Mar 31
2
Dovecot not honoring configuration settings (auth failure)
My dovecot.conf has the following:
# No results when searching the wiki
disable_plaintext_auth = no
# http://wiki2.dovecot.org/Authentication/Mechanisms
auth_mechanisms = plain login digest-md5 cram-md5
When I attempt to run imapsync, I receive an error:
Host2: <host> says it has NO CAPABILITY for AUTHENTICATE LOGIN
imapsync also dumps the helo string, and it is
2014 Apr 01
6
[LLVMdev] Proposal: Loads/stores with deterministic trap/unwind behavior
Hi,
I wanted to propose an IR extension that would allow us to support zero-cost
exception handling for non-call operations that may trap. I wanted to start
with loads and stores through a null pointer, and later we might extend this to
div/rem/mod zero. This feature is obviously useful for implementing languages
such as Java and Go which deterministically translate such operations into
2014 Mar 31
3
[LLVMdev] Contributing the Apple ARM64 compiler backend
On Mon, Mar 31, 2014 at 1:01 PM, Renato Golin <renato.golin at linaro.org>wrote:
> On 31 March 2014 20:55, Tim Northover <t.p.northover at gmail.com> wrote:
> > I'd almost prefer to leave it in for the bugs to be discovered
> > (perhaps after some simple tests of our own). ARM went wirthout
> > FastISel support on Linux for years simply because it was declared
2014 Mar 31
1
Video calls using Cisco phones are 176x144(QCIF) and 15FPS both ways
We are experiencing an issue with our Cisco 9971 and 8945 phones where H264
video calls are connecting at 176x144 resolution instead of 640x480. Soft
clients can connect at higher resolutions and the 9971 can even receive
video at a higher resolution (although it still sends 176x144).
I contacted one of the developers and he suggested the passthrough of SDP
attributes is not working correctly.
2014 Mar 31
3
[LLVMdev] [lld] supporting gnu linkonce sections in core linking
Hi Nick, Bigcheese,
I wanted to add support to support .gnu.linkonce sections in the resolver.
_*About .gnu.linkonce sections*_
.gnu.linkonce sections were primarily present in ELF that was used in a
way to model COMDAT in early ELF implementations.
We have seen usecases of .gnu.linkonce sections used in various object
files(mainly libc), and I think its much needed to support this style in
2014 Mar 18
4
[LLVMdev] TableGen docs
Hi folks,
It took a while, but I finally have some bandwidth to look at this.
I've been reading the two existing TableGen documents:
http://llvm.org/docs/TableGenFundamentals.html
http://llvm.org/docs/TableGen/LangRef.html
the first is linked from the index, but LangRef is not (though it has
some remains in the metadata). I'm wondering what's the relationship
between them two.
My
2014 Apr 01
2
[LLVMdev] Proposal: Add a guaranteed tail call marker
Some frontends for LLVM require that LLVM perform tail call optimization
(TCO) for correctness. Internally, LLVM refers to TCO of a non-recursive
tail call as sibling call optimization, but I'm going to refer to that
generically as TCO. Often, functional languages like Scheme have a
language-level requirement that TCO occurs for any call in the tail
position, and this is usually why users of