similar to: [LLVMdev] release procedure questions

On 03/10/2014 03:37 PM, Eric Christopher wrote: > cc'ing Bill as Release Manager > > On Mon, Mar 10, 2014 at 2:53 PM, reed kotler <rkotler at mips.com> wrote: >> I'm trying to understand how Mips will fit into the official release >> procedure. >> >> There are two Mips compilers: >> 1) The X86 resident llvm/clang compiler that can generate

On 02/24/2014 04:42 PM, Eric Christopher wrote: > On Mon, Feb 24, 2014 at 4:40 PM, reed kotler <rkotler at mips.com> wrote: >> I need to leave soon and will take a look in the morning. >> >> I did look at the autoconf input files configure.ac >> >> There is a disable-zlib but not a disable-valgrind, even though it seems >> like there used to be.

I need to leave soon and will take a look in the morning. I did look at the autoconf input files configure.ac There is a disable-zlib but not a disable-valgrind, even though it seems like there used to be. You can find scripts on the internet when you google of people adding disable-valgrind to configure. I can probably implement disable-valgrind in configure.ac. Reed On 02/24/2014 04:33

In case anyone is interested.... We don't need to compile llvm/clang using gcc anymore for the building of mips hosted llvm compilers. We build a linux mips hosted compiler starting with llvm/clang on x86 linux using the normal configure scripts and then can use that resulting compiler to build further llvm/clang native compilers on the mips linux host. The cross compiler and native

Okay. Cool. So do you bootrstrap and verify as part of the usual testing? Do the nightly scripts do this? Reed On 06/28/2012 11:08 AM, Eric Christopher wrote: > On Jun 27, 2012, at 10:48 PM, Reed Kotler<rkotler at mips.com> wrote: > >> On 06/27/2012 05:00 PM, Eric Christopher wrote: >>> On Jun 19, 2012, at 5:24 PM, reed kotler<rkotler at mips.com> wrote:

On 02/24/2014 04:19 PM, Eric Christopher wrote: > On Mon, Feb 24, 2014 at 4:14 PM, reed kotler <rkotler at mips.com> wrote: >> I'm trying to build a native hosted mips compiler on ubuntu x86. >> >> When I run configure with clang/llvm as the compiler, configure thinks that >> zlib is present and that valgrind is. >> >> But later on the make it

We have NFS mounted drives. I first build an clang/llvm hosted compiler for Mips linux using the clang/llvm linux x86 compiler. Call this clang1. then in directory recurse on Mips host, I place this clang1 compiler and build clang2. then i rename recurse to recurse1 and create a new recurse directory. in recurse I copy clang2 from recurse1 to a recurse but name it clang1. then i build

I see what my problem is here.... I'll continue to move further. Seems like Richards fix is still okay. On 02/25/2014 02:42 PM, Eric Christopher wrote: > On Tue, Feb 25, 2014 at 2:41 PM, reed kotler <rkotler at mips.com> wrote: >> On 02/25/2014 02:38 PM, Eric Christopher wrote: >>> On Tue, Feb 25, 2014 at 2:32 PM, reed kotler <rkotler at mips.com> wrote:

You are trying to do a few different things here, and a uniform solution may not work for all of them. For a fixed instruction sequence, e.g. a special kind of move-and-branch sequence used for tail calls, you probably want a pseudo. If you are trying to combine arbitrary instructions together, e.g. Thumb IT blocks, you probably want to use bundles, even if the sequences are a fixed length. I

On 02/25/2014 02:38 PM, Eric Christopher wrote: > On Tue, Feb 25, 2014 at 2:32 PM, reed kotler <rkotler at mips.com> wrote: >> On 02/25/2014 09:30 AM, Richard Sandiford wrote: >>> reed kotler <rkotler at mips.com> writes: >>>> On 02/24/2014 04:42 PM, Eric Christopher wrote: >>>>> On Mon, Feb 24, 2014 at 4:40 PM, reed kotler <rkotler at

On 06/27/2012 05:00 PM, Eric Christopher wrote: > On Jun 19, 2012, at 5:24 PM, reed kotler<rkotler at mips.com> wrote: > >> Do the llvm nightly scripts "recurse" the compiler or just test that it >> can self host itself? >> > No idea what you mean here. Can you explain? > > -eric recursing a compiler means this. clang/llvm source == src compile

We already divided out our classes as you did for ARM. The problem here is that we have a store/load byte/halfword to/from a Frame object. We know at that time that it's not going to be possible to store it using SP because there is only such instructions for store/load of a word. What we would want to do is to move SP into a Mips 16 register and then do a indexed load/store off of that

I'm trying to build a native hosted mips compiler on ubuntu x86. When I run configure with clang/llvm as the compiler, configure thinks that zlib is present and that valgrind is. But later on the make it cannot find zlib.h. If I tell it to not do compression, then it does not look for zlib.h but dies looking for valgrind, even if I tell it to disable-valgrind. If I configure using

Ok. That's a somewhat different problem, then. Devil will be in the details of what you want to do. A few options. First is to always have a standard frame pointer register available and reference off of that. Caveat: dynamic stack realignment and vararrays muck with that more than a bit. Second is what gcc is doing and reserve a register just for this in addition to the frame register.

I used the A9 schedule as an example: http://llvm.org/svn/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleA9.td The documentation could use more clarity, but this is how I was able to do it to always get two specific instructions to be scheduled together. ________________________________________ From: reed kotler [rkotler at mips.com] Sent: Tuesday, September 17, 2013 8:54 PM To: Micah Villmow

Reed, Couldn't you also use instruction scheduling classes and specify that the second instruction has a bypass from the first instruction? The scheduler should always schedule them together in that case. Micah > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On > Behalf Of reed kotler > Sent: Tuesday, September 17, 2013

On 06/10/2014 05:51 PM, Pete Cooper wrote: > Hi Reed > > You can do this on the instruction itself by telling it 2 operands > must be the same register. For example, from X86: > > let Constraints = "$src1 = $dst" in > defm INSERTPS : SS41I_insertf32<0x21, "insertps">; > > Thanks, Hi Pete, Sorry. I should have been more specific. I'm

On 01/08/2013 01:48 PM, Eli Friedman wrote: > On Mon, Jan 7, 2013 at 6:07 PM, reed kotler <rkotler at mips.com> wrote: >> For example: >> >> /home/rkotler/llvm/install/bin/llc -mcpu=mips16 hf16_2.ll -march=mipsel >> -relocation-model=pic -o hf16_2.s -O3 -mips16-hard-float -soft-float > Try something like the following: > > float f; > double test(void*

If you can't make an executable test from C or C++ code then how do you know something works. Just by examination of the .s? On 09/30/2014 03:18 PM, Reed Kotler wrote: > If I wanted to call this function that they generated by hand, from C or > C+ code, how would that be done? > > if have seen cases where a real boolean gets generated but it was > something fairly involved.

+the list again On Sep 17, 2013, at 3:48 PM, reed kotler <rkotler at mips.com> wrote: > On 09/17/2013 03:46 PM, Owen Anderson wrote: >> On Sep 17, 2013, at 3:08 PM, reed kotler <rkotler at mips.com> wrote: >> >>> Is there any way, except for using bundles, to force two instructions to be sequentially executed? >> What level of codegen are you working at?