similar to: [LLVMdev] New machine model questions

Displaying 20 results from an estimated 300 matches similar to: "[LLVMdev] New machine model questions"

2014 Jan 28
3
[LLVMdev] New machine model questions
From: Andrew Trick [mailto:atrick at apple.com] Sent: 24 January 2014 21:52 To: Daniel Sanders Cc: LLVM Developers Mailing List (llvmdev at cs.uiuc.edu) Subject: Re: New machine model questions On Jan 24, 2014, at 2:21 AM, Daniel Sanders <Daniel.Sanders at imgtec.com<mailto:Daniel.Sanders at imgtec.com>> wrote: Hi Andrew, I seem to be making good progress on the P5600 scheduler
2016 May 13
2
A question about AArch64 Cortex-A57 subtarget definition
Hello everybody, I'm reading the .td files defining the Cortex-A57 processor, which is a subtarget of AArch64 target, and there is something confusing me in the `AArch64SchedA57.td` file. In the top of `AArch64SchedA57.td`, various processor resource are defined, as follows ``` def A57UnitB : ProcResource<1>; // Type B micro-ops def A57UnitI : ProcResource<2>; // Type
2014 Feb 18
2
[LLVMdev] Question about per-operand machine model
Hi Andy and all, I have a question about per-operand machine model. I am finding some relations between 'MCWriteLatencyEntry' and 'MCWriteProcResEntry'. For example, class InstTEST<..., InstrItinClass itin> : Instruction { let Itinerary = Itin; } // I assume this MI writes 2 registers. def TESTINST : InstTEST<..., II_TEST> // schedule info II_TEST:
2018 Nov 15
2
Per-write cycle count with ReadAdvance - Do I really need that?
Hi list, I happened to read below thread (written in 3 years ago). I think I may need this ReadAdvance feature to work with my ARCH. It is about the scheduler info which describes reading my ARCH's vector register. There are different latencies since forwarding/bypass appears. I give it as below example: def : WriteRes<WriteVector, [MyArchVALU]> { let Latency = 6; } ... def
2018 Nov 17
2
Per-write cycle count with ReadAdvance - Do I really need that?
Thanks Andrew. I have tried with recent tblgen, ReadAdvance would not work for multiple latencies. Maybe I should make improvement into tblgen if Pierre-Andre does not have the change anymore. However, I just a little curious about the situation I met. The hardware forwording may fail for different reasons, which different register read may have different latencies, depending both on the register
2018 Nov 19
2
Per-write cycle count with ReadAdvance - Do I really need that?
It does not work. I have tried to use the latest master today. But tblgen still give me information like error: Resources are defined for both SchedRead and its alias on processor MyArchModel def : ReadAdvance<MyReadVector, 3, [MyWriteAddVector]>; ^ Unless I change "MyReadVector" to another read like "MyReadVector1", it would not work. Debugging into tblgen, there is
2016 Mar 08
2
Head at revision #262824 - breaks Movidius Out-of-Tree target
[I tweaked the subject, #262824 did not introduce the problem, it is just the version I am first seeing this problem] A quick update - I have added 'Sched<[]>' as a base class for all instructions, and also: let hasNoSchedulingInfo = 1; to all the Pseudos, but while most of the errors have gone, I still get the diagnostic for 'COPY' thus: error : No schedule
2015 Mar 27
2
[LLVMdev] Question about load clustering in the machine scheduler
Hi, I have a program with over 100 loads (each with a 10 cycle latency) at the beginning of the program, and I can't figure out how to get the machine scheduler to intermix ALU instructions with the loads to effectively hide the latency. It seems the issue is with load clustering. I restrict load clustering to 4 at a time, but when I look at the debug output, the loads are always being
2018 Feb 08
0
[VLIW Scheduler] Itineraries vs. per operand scheduling
We have a two different dimensions for each instruction: slot assignments, and operand timings. These two are unrelated to each other, and also each (or both) can change for any given instruction from one architecture version to the next. The main concern for us was which of these mechanisms contains all the information that we need. We cannot express all the scheduling details by hand, and
2018 Feb 08
2
[VLIW Scheduler] Itineraries vs. per operand scheduling
Hi Krzysztof, 2018-02-08 13:32 GMT+08:00 Andrew Trick via llvm-dev < llvm-dev at lists.llvm.org>: > > > On Feb 4, 2018, at 9:15 AM, Yatsina, Marina via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > Hi, > > What is the best way to model a scheduler for a VLIW in-order architecture? > I’ve looked at the Hexagon and R600 architectures and they are using
2013 Jul 22
2
[LLVMdev] Questions about MachineScheduler
Hi, I'm working on defining a SchedMachineModel for the Southern Islands family of GPUs, and I have two questions related to the MachineScheduler. 1. I have a resource that can process 15 instructions at the same time. In the TableGen definitions, should I do: def HWVMEM : ProcResource<15>; or let BufferSize = 15 in { def HWVMEM : ProcResource<1>; } 2. Southern Islands has
2015 Mar 27
2
[LLVMdev] Question about load clustering in the machine scheduler
On Thu, Mar 26, 2015 at 11:50:20PM -0700, Andrew Trick wrote: > > > On Mar 26, 2015, at 7:36 PM, Tom Stellard <tom at stellard.net> wrote: > > > > Hi, > > > > I have a program with over 100 loads (each with a 10 cycle latency) > > at the beginning of the program, and I can't figure out how to get > > the machine scheduler to intermix ALU
2006 Aug 22
1
a generic Adaptive Gauss Quadrature function in R?
Hi there, I am using SAS Proc NLMIXED to maximize a likelihood with multivariate normal random effects. An example is the two part random effects model for repeated measures semi-continous data with a cluster at 0. I use the "model y ~ general(loglike)" statement in Proc NLMIXED, so I can specify a general log likelihood function constructed by SAS programming statements. Then the
2014 Mar 03
2
[LLVMdev] Question about per-operand machine model
On Mar 3, 2014, at 8:53 AM, Pierre-Andre Saulais <pierre-andre at codeplay.com> wrote: > Hi Andrew, > > We are currently using a custom model where scheduling information is attached to each MCInstrDesc through tablegen, and we're trying to move to one of LLVM's models. > > To expand on what JinGu mentioned, our target has explicit ports that are used to read and
2014 Feb 28
2
[LLVMdev] Question about per-operand machine model
On Feb 19, 2014, at 1:54 PM, jingu <jingu at codeplay.com> wrote: > Hi Andy, > > I am trying to schedule and packetize instructions for VLIW at post-RA > stage or final codegen stage, where code transformations are not allowed > any more, because hardware can not resolve resource conflict. There is a > simple example as following: > > ADD dest_reg1, src_reg1,
2012 Oct 30
2
help with lme
Dear Madam or Sir I am writing you hoping, that you can help me with a problem concerning the output of regressions done with the function lme in R. I would need the standard deviations for intercepts and predictors, but in the output I can only find those for the intercepts. Could it be, that this is my fault? (I am just a beginner with R and multilevel modeling). I am sorry to annoy you with
2008 Jul 06
2
Error: cannot use PQL when using lmer
> library(MASS) > attach(bacteria) > table(y) y n y 43 177 > y<-1*(y=="y") > table(y,trt) trt y placebo drug drug+ 0 12 18 13 1 84 44 49 > library(lme4) > model1<-lmer(y~trt+(week|ID),family=binomial,method="PQL") Error in match.arg(method, c("Laplace", "AGQ")) : 'arg' should be one of
2013 Jul 23
0
[LLVMdev] Questions about MachineScheduler
On Jul 22, 2013, at 11:50 AM, Tom Stellard <tom at stellard.net> wrote: > Hi, > > I'm working on defining a SchedMachineModel for the Southern Islands > family of GPUs, and I have two questions related to the > MachineScheduler. > > 1. I have a resource that can process 15 instructions at the same time. > In the TableGen definitions, should I do: > > def
2014 Mar 04
2
[LLVMdev] Question about per-operand machine model
On Mar 4, 2014, at 10:05 AM, Pete Cooper <peter_cooper at apple.com> wrote: > > On Mar 3, 2014, at 2:21 PM, Andrew Trick <atrick at apple.com> wrote: > >> >> On Mar 3, 2014, at 8:53 AM, Pierre-Andre Saulais <pierre-andre at codeplay.com> wrote: >> >>> Hi Andrew, >>> >>> We are currently using a custom model where
2005 Dec 05
1
extracting p-values from lmer()
Dear R users, I've been struggling with the following problem: I want to extract the Wald p-value from an lmer() fit, i.e., consider library(lme4) n <- 120 x1 <- runif(n, -4, 4) x2 <- sample(0:1, n, TRUE) z <- rnorm(n) id <- 1:n N <- sample(20:200, n, TRUE) y <- rbinom(n, N, plogis(0.1 + 0.2 * x1 - 0.5 * x2 + 1.5 * z)) m1 <- lmer(cbind(y, N - y) ~ x1 + x2 + (1 | id),