similar to: [LLVMdev] Is sizeof(pointer) known in LLVM IR?

On 20 December 2013 22:44, Philip Reames <listmail at philipreames.com> wrote: > Looking through the IR documentation, I have been unable to establish if > the size of a pointer value is knowable to an LLVM optimization pass. > For an IR->IR optimization pass, is the pass allowed to assume anything > about the size of a pointer value? Or is making such an assumption >

On 02/24/2014 11:27 AM, Andrew Trick wrote: > > On Feb 24, 2014, at 11:17 AM, Philip Reames <listmail at philipreames.com > <mailto:listmail at philipreames.com>> wrote: > >> >> On 02/24/2014 12:45 AM, Andrew Trick wrote: >>> >>> On Feb 21, 2014, at 10:37 AM, Philip Reames >>> <listmail at philipreames.com <mailto:listmail at

On 02/24/2014 12:45 AM, Andrew Trick wrote: > > On Feb 21, 2014, at 10:37 AM, Philip Reames <listmail at philipreames.com > <mailto:listmail at philipreames.com>> wrote: > >> >> On 02/14/2014 05:55 PM, Philip Reames wrote: >>> Splitting out a conversation which started in "make DataLayout a >>> mandatory part of Module" since the

On 02/14/2014 05:55 PM, Philip Reames wrote: > Splitting out a conversation which started in "make DataLayout a > mandatory part of Module" since the topic has decidedly changed. This > also relates to the email "RFC: GEP as canonical form for pointer > addressing" I just sent. > > On 02/10/2014 05:25 PM, Nick Lewycky wrote: >> ... >> >>

On 02/17/2014 02:53 PM, Andrew Trick wrote: > On Feb 17, 2014, at 2:31 AM, David Chisnall <David.Chisnall at cl.cam.ac.uk> wrote: > >> On 15 Feb 2014, at 23:55, Andrew Trick <atrick at apple.com> wrote: >> >>> On Feb 14, 2014, at 5:18 PM, Philip Reames <listmail at philipreames.com> wrote: >>> >>>> RFC: GEP as canonical form for

> On Jan 4, 2016, at 9:55 AM, Amaury SECHET via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > > 2016-01-04 18:21 GMT+01:00 Philip Reames <listmail at philipreames.com <mailto:listmail at philipreames.com>>: > On 01/04/2016 07:32 AM, Amaury SECHET wrote: >> After a bit more investigation, it turns out that because %0 is stored into %1 (after

On 01/04/2016 07:32 AM, Amaury SECHET wrote: > After a bit more investigation, it turns out that because %0 is stored > into %1 (after bitcast) and so %3 may have access to it and clobber it. Can you give a bit more context? I'm not sure which of the examples you're talking about. > > After a bit of thought, it is correct in the general case, but > definitively something

Sorry, what does "PC" mean here? ________________________________ From: Philip Reames <listmail at philipreames.com> Sent: Thursday, November 8, 2018 7:27 AM To: Jordan Rudd; llvm-dev at lists.llvm.org Subject: Re: [llvm-dev] Passing stack pointer to statepoint-gc Jordon, First of all, StackMaps are keyed by PC, not by SP. Each entry corresponds to given location within the

On 15 Feb 2014, at 23:55, Andrew Trick <atrick at apple.com> wrote: > On Feb 14, 2014, at 5:18 PM, Philip Reames <listmail at philipreames.com> wrote: > >> RFC: GEP as canonical form for pointer addressing >> >> I would like to propose that we designate GEPs as the canonical form for pointer addressing in LLVM IR before CodeGenPrepare. >> >>

Is anyone aware of an existing framework for asking liveness questions about SSA values in the IR? I'm looking for something more precise than the trivial definition provided by SSA itself. I can write something myself (and will if need be), but it seemed like a generic enough problem that I was surprised I couldn't find something already in tree. Anyone know of something I've

Thanks for sharing the known problem. I think to solve the problem properly, we need to fully understand why that assumption about dominance is there and the implications of removing it. It would be good if you could be more specific about your idea of nullptr or SCEV_unknown (eg which function would return those values and when), but returning nullptr from getAddExpr or getSCEVAtScope may be

x86 has also put a lot of effort into shuffle lowering...so much so that it is its own life-form and brings most online codeviewer apps to their knees when you try to open X86ISelLowering.cpp. :) Given that: 1. There are at least 2 targets that lean towards shuffle (Martin's comment + x86 uses lowerVSELECTtoVectorShuffle() for all cases like the example posted here) 2. Size-changing shuffles

2015-12-26 18:32 GMT+01:00 Philip Reames <listmail at philipreames.com>: > On 12/26/2015 02:17 AM, Amaury SECHET via llvm-dev wrote: > > I'm trying to fix that bug: https://llvm.org/bugs/show_bug.cgi?id=20049 > > It turns out this is the kind of optimization that I really need, as when > it isn't done, all kind of other optimizations opportunities down the road

On 01/21/2016 01:51 PM, Sean Silva wrote: > > > On Thu, Jan 21, 2016 at 1:33 PM, Philip Reames > <listmail at philipreames.com <mailto:listmail at philipreames.com>> wrote: > > > > On 01/19/2016 09:04 PM, Sean Silva via llvm-dev wrote: >> >> AFAIK, the cost of a well-predicted, not-taken branch is the same >> as a nop on every x86

Hi Jimmy, It's good to know that the problem is not specific to the case I ran into. May be you can provide your example as well, since Philip seems to be interested in some specific examples. If the assertion in getAddrExpr is deemed necessary, then I think a condition check would be the next best solution as it helps client code guard against such cases and make alternative arrangements to

Hi, I am investigating a difference in code generation between release and assert builds of llvm. The culprit is IndVarSimplify that comes up with different behavior on the same input: in the assertion build, it does do an extra 'INDVARS: Rewriting loop exit condition' After digging around, it seems that following change is the culprit: ----- Author: Philip Reames <listmail at

I have a slight preference towards shufflevector, because it makes sequences of shuffles, where only some of the shuffles can be converted into selects (because the input and output vector sizes of the others don't match) simpler to reason about. I'm not sure this is a particularly good reason, though. On Mon, Aug 29, 2016 at 8:19 AM, Philip Reames via llvm-dev < llvm-dev at

On 04/19/2016 09:35 AM, Ahmed Bougacha wrote: > On Mon, Apr 18, 2016 at 4:28 PM, Philip Reames > <listmail at philipreames.com> wrote: >> >> >> On 04/18/2016 10:52 AM, Ahmed Bougacha via llvm-dev wrote: >> >> On Mon, Apr 18, 2016 at 9:45 AM, Artur Pilipenko via llvm-dev <llvm-dev at lists.llvm.org> wrote: >>> Does this sound reasonable? Are

Hi Sanjoy, Thanks for the reply! Your approach sounds good to me! I think 1) is legal as address wraparound in unsigned range doesn't make sense given a positive offset, but I am not sure. I think umax will not be added if we can prove the predicate as known. I am not sure whether umax will get simplified if we add nuw to the expressions. -Pankaj -----Original Message----- From: Sanjoy

> On Jan 22, 2020, at 19:49, Philip Reames <listmail at philipreames.com> wrote: > > In short, I hit a major stumbling block. I hadn't account for the fact that some atomic stores dependent on element type (float vs int for instance) for legality. I think this qualifies as a target/infrastructure bug. It should always be legal to cast the FP atomic load/store to integer. This