similar to: [LLVMdev] How to build a map between IR Instruction and MachineInstrs?

Displaying 20 results from an estimated 500 matches similar to: "[LLVMdev] How to build a map between IR Instruction and MachineInstrs?"

2013 Dec 21
0
[LLVMdev] Question about Pre-RA-schedule in LLVM3.3
The flag -enable-aa-sched-mi should do what you want you want in the MachineScheduler pass. If you want to do it in the selection DAG, there is a subtarget hook that might do it: TargetSubtargetInfo::useAA() LLVM won’t generate the schedule you want anyway for Intel core processors, but the alias analysis can be useful in general. -Andy On Dec 16, 2013, at 6:03 AM, Haishan <hndxvon at
2013 Dec 16
2
[LLVMdev] Question about Pre-RA-schedule in LLVM3.3
At 2013-12-15 22:43:34,"Caldarale, Charles R" <Chuck.Caldarale at unisys.com> wrote: >> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] >> On Behalf Of Haishan >> Subject: [LLVMdev] Question about Pre-RA-schedule in LLVM3.3 > >> My clang version is 3.3 and debug build. > >> //test.c >> int a[6] = {1, 2, 3, 4, 5,
2013 Dec 15
0
[LLVMdev] Question about Pre-RA-schedule in LLVM3.3
> From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Haishan > Subject: [LLVMdev] Question about Pre-RA-schedule in LLVM3.3 > My clang version is 3.3 and debug build. > //test.c > int a[6] = {1, 2, 3, 4, 5, 6} > int main() { >  a[0] = a[5]; >  a[1] = a[4]; >  a[2] = a[5]; > } > //end test.c > Then test.dump is
2013 Dec 15
3
[LLVMdev] Question about Pre-RA-schedule in LLVM3.3
Hi, I compile a case (test.c) to get object machine file (test.o) using clang as follows: "clang -target arm -integrated-as -c test.c -o test.o" My clang version is 3.3 and debug build. //test.c int a[6] = {1, 2, 3, 4, 5, 6} int main() { a[0] = a[5]; a[1] = a[4]; a[2] = a[5]; } //end test.c Then test.dump is generated by using the objdump tool. //test.dump ldr r1, [r0, #20]
2006 Jun 15
2
[LLVMdev] problem with loopinfo
hi, The loopinfo pass failed to recognize the Tripcount of a simple program constructed by me, can you help me to figure out why this happened? Thanks. The C program and corresponding .ll files are shown below. I used llvm1.7 to develop my own pass, and want to use the loop information. -Wei Test.c: #include "stdio.h" #define N 40 void func1() { int a[N]; int i,j; for
2013 Dec 12
0
[LLVMdev] How to build a map between IR Instruction and MachineInstrs?
Hi, I try to add a backend (machine function) pass in LLVM 3.3 source code. In order to analyse precise information of machine instructions, I need some information of IR instruction which corresponds to MachineInstrs. If so, it's much easier to analyse IR Instructions instead of MachineInstrs. However, in the frame of LLVM 3.3, I can't find the corresponding(connected) information from
2006 Jun 15
2
[LLVMdev] problem with loopinfo
I did run the indvars pass, but it seemed that it didn't work. -Wei ----- Original Message ----- From: "Chris Lattner" <sabre at nondot.org> To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> Sent: Thursday, June 15, 2006 3:35 PM Subject: Re: [LLVMdev] problem with loopinfo > On Thu, 15 Jun 2006, Wei Jiang wrote: >> hi, >> The
2006 Jun 15
0
[LLVMdev] problem with loopinfo
On Thu, 15 Jun 2006, Wei Jiang wrote: > hi, > The loopinfo pass failed to recognize the Tripcount of a simple program constructed by me, can you help me to figure out why this happened? Thanks. > The C program and corresponding .ll files are shown below. I used llvm1.7 to develop my own pass, and want to use the loop information. What passes are you running before your pass? trip
2010 Jun 22
1
[LLVMdev] Using llc to compile a .ll into a .s for ARM
Hi, I've battled with this now for a good many hours, and I was wondering if someone could point in the right direction. What I want to do is with the kaleidoscope tutorial code, take the IR from a run where I've just done " def test(x) 42.0*x; " resulting in the file test.ll " ; ModuleID = 'my cool jit' define double @test(double %x) { entry: %multmp = fmul
2006 Jun 15
0
[LLVMdev] problem with loopinfo
On Thu, 15 Jun 2006, Wei Jiang wrote: > I did run the indvars pass, but it seemed that it didn't work. Then you'll have to trace through and find out why it's failing... -Chris > ----- Original Message ----- From: "Chris Lattner" <sabre at nondot.org> > To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Sent: Thursday, June 15,
2014 Jan 03
2
[LLVMdev] How to update LiveInterval information of newly inserted machine basic block
On Jan 3, 2014, at 1:06 PM, Andrew Trick <atrick at apple.com> wrote: > > On Jan 3, 2014, at 12:10 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote: > >> >> On Jan 3, 2014, at 11:01 AM, Andrew Trick <atrick at apple.com> wrote: >> >>> >>> On Jan 3, 2014, at 4:58 AM, Haishan <hndxvon at 163.com> wrote: >>>
2014 Jan 03
2
[LLVMdev] How to update LiveInterval information of newly inserted machine basic block
At 2014-01-01 04:36:21,"Andrew Trick" <atrick at apple.com> wrote: On Dec 31, 2013, at 3:52 AM, Haishan <hndxvon at 163.com> wrote: Hi, I insert a new machine basic block(MBB) before Greedy Register Allocation, after Simple Register Coalescing. But I encounter a fatal error "regalloc = ... not currently supported with -O0". I use command line with opt level
2013 Nov 29
1
[LLVMdev] Question about ExprConstant optimization of IR stage
Hi Tim, Firstly, thanks for your reply. I agree on your idea about integer overflow in this test. But, in fact, the content of this test is the same to gcc\testsuite\gcc.c-torture\execute\920612-1.c. gcc can handle it correctly. Moreover, when I compile this test using clang with optlevel O0 instead of O2. Its execution result is the same to gcc. That to say, for this test, clang with optlevel
2014 Jan 03
2
[LLVMdev] How to update LiveInterval information of newly inserted machine basic block
On Jan 3, 2014, at 11:01 AM, Andrew Trick <atrick at apple.com> wrote: > > On Jan 3, 2014, at 4:58 AM, Haishan <hndxvon at 163.com> wrote: > >> >> At 2014-01-01 04:36:21,"Andrew Trick" <atrick at apple.com> wrote: >> >> On Dec 31, 2013, at 3:52 AM, Haishan <hndxvon at 163.com> wrote: >> My update steps are shown
2013 Nov 28
2
[LLVMdev] Question about ExprConstant optimization of IR stage
hi, I compile a case (test.c) to get IR file (test.ll) using clang as follows: "clang -emit-llvm -S -O2 test.c -o test.ll" My clang source code version is release 3.3 and debugging build. //test.c int foo(int j) { return ++j > 0; } int main() { if (foo(((~0U)>>1))) abort(); exit(0) } //end test.c Here are the generated IR file: //test.ll ;
2014 Jun 23
2
[LLVMdev] How to add a MVT::Glue property of intrinsic node?
Hi, I have implemented a pair intrinsic nodes in back-end, But there is a chain dependence between two intrinsic nodes. So in the Pre-RA-sched stage, these two intrinsic nodes would be apart. I expect that there is no node between these two intrinsic nodes, therefore, I guess it would be work if there is a MVT::Glue between these nodes. But I don’t know how to add. Thanks in advance. Haishan
2013 Nov 28
0
[LLVMdev] Question about ExprConstant optimization of IR stage
Hi Haishan, > int foo(int j) { > return ++j > 0; > } > int main() { > if (foo(((~0U)>>1))) > abort(); > exit(0) > } This test contains undefined behaviour, and you can never rely on the compiler doing anything predictable with that. Specifically, the result of casting (~0U) >> 1 to an int is almost certainly INT_MAX and when foo
2013 Dec 31
2
[LLVMdev] How to update LiveInterval information of newly inserted machine basic block
Hi, I insert a new machine basic block(MBB) before Greedy Register Allocation, after Simple Register Coalescing. But I encounter a fatal error "regalloc = ... not currently supported with -O0". I use command line with opt level O2, not O0. The probable reason of this error is that no LiveInterval information for newly MBB which is used by Register Allocation. And, LiveIntervals depend
2014 Jan 04
2
[LLVMdev] How to update LiveInterval information of newly inserted machine basic block
On Jan 4, 2014, at 4:38 AM, Haishan <hndxvon at 163.com> wrote: > At 2014-01-04 06:11:38,"Jakob Stoklund Olesen" <stoklund at 2pi.dk> wrote: > > On Jan 3, 2014, at 1:52 PM, Andrew Trick <atrick at apple.com> wrote: > >> He really just wants to rerun LiveIntervals analysis, but LiveVariables is no longer available. Would it work just to clear all
2004 Dec 15
2
Compiling samba on Solaris 8 --with-ads
Hello, I'm trying to Compile Samba with ADS support on Solaris 8. I have installed without any problems: /opt/cifs/bdb -> .bdb-4.2.52 /opt/cifs/heimdal -> .heimdal-0.6.3 /opt/cifs/openldap -> .openldap-2.1.25 /opt/cifs/openssl -> .openssl-0.9.7e /opt/cifs/samba -> .samba-3.0.9 and I'm configuring samba with: LDFLAGS="-L/opt/cifs/openldap/lib