similar to: [LLVMdev] create load from a register in LLVM IR

Hi Chen, > I have recently encountered a problem when creating LLVM IRs. I am wondering > if there is a standard or easy way to create a load from a certain register? > For example, CreateLoad(rbp, NAME). LLVM doesn't directly provide access to any machine registers. If you want %rbp because it's the frame pointer then for that one case there is actually an @llvm.frameaddress

Hi! Sorry for delay, just returned from vacation. On 12/11/15 23:44, Kostya Serebryany via llvm-dev wrote: > +Maxim and Yuri, as I think this is their code. > > On Thu, Nov 12, 2015 at 3:02 AM, Jay Foad <jay.foad at gmail.com > <mailto:jay.foad at gmail.com>> wrote: > > (Resending with the correct mailing list address.) > > Hi, > > Currently

Jay, do you have a PowerPC64 target? If so, could you please check attached patch on PPC box? This is a draft patch, but it would be nice to make sure that we are moving to right direction here. Thanks, -Maxim On 18/11/15 00:12, Jay Foad wrote: >>> Currently test/asan/TestCases/alloca_vla_interact.cc is XFAILed for >>> powerpc64. I've had a look at why it

In LowerGET_DYNAMIC_AREA_OFFSET() you're calling MFI->getMaxCallFrameSize(), but it looks like that doesn't return useful information until after the PrologEpilogInserter's PEI::calculateCallsInformation() has run. So maybe the lowering has to be done as part of frame index elimination? (I'm not too familiar with this code.) Jay. On 23 November 2015 at 13:07, Jay Foad

Hi, I would like to prevent that two adjacent calls to external functions getting interleaved/separated by other neighboring code. This mixing seems to happen in the code generator. I can prevent it by putting the two calls into a separate BB, but then I can't use -simplifycfg, -jump-threading, ... as is. Here is an example: %160 = add i64 %158, %159 ; <i64>

Hi everyone, We seem to have allowed our documented target-independent intrinsics to acquire a somewhat-haphazard naming system, and I think we should standardize on one convention. All of the intrinsics have 'llvm.' as a prefix, and some also have some additional prefix 'llvm.dbg.', 'llvm.eh.', 'llvm.experimental.', etc., but after that we lose consistency. When

I read the tutorial doc and some info of SSA, finally understand it. Thanks for your help. And the segmentation error of loading arguementation occurs, (gdb error info) Program received signal SIGSEGV, Segmentation fault. 0x0855bb68 in llvm::LoadInst::LoadInst(llvm::Value*, char const*, bool, llvm::Instruction*) () code is like follows: //#include necessary header files int main(){

On Thu, Sep 22, 2011 at 3:46 PM, sarath chandra <sarathcse19 at gmail.com>wrote: > Hi James, > > First i converted the void * to int* and then did FPToSI...then did SHL...( > because CreateShl only accepts integers... i pointer casted it to int64 type > first)... Below is the code snippet.... > > > lhs = mBuilder.CreateStructGEP(firstArg, 0); > lhs =

in the tutorial of official llvm doc, chapter 3, it deals with arguement of function as follow: for (Function::arg_iterator AI = F->arg_begin(); Idx != Args.size(); ++AI, ++Idx) { AI->setName(Args[Idx]); // NamedValues is map<string, Value*> NamedValues[Args[Idx]] = AI; and when it try to get the value of arguement, it simply does: Value

Hi Sarath, It would have really helped if you had removed the commented out code and inlined the calls to your homemade helper functions before sending it... You are doing this, in LLVM IR: %0 = getelementptr %Value* %firstArg, i32 0 ; i8** %1 = load i8** %0 ; i8* %2 = bitcast i8* %1 to i64* %3 = getelementptr %Value* %secondArg, i32 0 ; i8** %4 = load i8** %3; i8* %5 = bitcast i8* %4 to i64*

Yeah, that's the fault...got the answer...... Thanks James for the help... Struggling with this for so many days....... On Thu, Sep 22, 2011 at 4:02 PM, James Molloy <James.Molloy at arm.com> wrote: > Hi Sarath,**** > > ** ** > > It would have really helped if you had removed the commented out code and > inlined the calls to your homemade helper functions before

hi On Sun, Apr 22, 2012 at 8:36 PM, Jianfei Hu <hujianfei258 at gmail.com> wrote: > in the  tutorial of official llvm doc, chapter 3, it deals with arguement of > function as follow: > > for (Function::arg_iterator AI = F->arg_begin(); Idx != Args.size(); >        ++AI, ++Idx) { >     AI->setName(Args[Idx]); > >     // NamedValues is map<string, Value*>

Hi all, I’ve been working on a Java-esque object-oriented language Bolt that targets LLVM IR. I’m agonisingly close to getting a virtual table working, and was hoping one of you could point out the gap in my understanding. I’ve linked the C++ code snippets relevant to the vtable below. Example IR generated (partially displayed below):

I have a question about inserting instructions into the LLVM IR. I can insert instructions, but my operands do not have the right type, so it fails an assertion at runtime. I am trying to insert an immediate load instructions, as a means of claiming a new register. Here is what I do: Builder.SetInsertPoint(LLVMBB, I); // The following line looks to me like it would have a chance of loading

If you want an immediate constant value, ConstantInt::get(APInt(32, 5, false)) will perhaps help you ? Olivier. 2009/5/5 seventh moon <suigintou_ at hotmail.com> > I have a question about inserting instructions into the LLVM IR. I can > insert instructions, but my operands do not have the right type, so it fails > an assertion at runtime. > > I am trying to insert an

Please reference the prior RFC on EfficiencySanitizer. This is one of the performance analysis tools we would like to build under the EfficiencySanitizer umbrella. ==================== Motivation ==================== An application is running sub-optimally if only part of the data brought into the cache is used, which we call cache fragmentation. Knowing the cache fragmentation information

On Tue, 9 Oct 2007, Sarah Thompson wrote: > ideally, I'd like a block that encompasses everything from the function > parameters up to the current top-of-stack including spilled registers. > Is this feasible? Hi Sarah, I'm not sure how much of this is possible. You're guaranteed that each function stack frame is itself contiguous (including spilled regs), but there

Hi all, I've been quiet for a while, but work on the new model checker has been going pretty well of late. I do have a question for the team, however. I've implemented code that manages multiple stacks, with an ability to version them and roll back and forward between versions so I can implement backtracking and nontrivial search strategies -- this all works. However, I'm

Hi, I created a global char array, char buffer[1024]. I want to call a function to append the string information to the buffer repeatedly. For example, I need to implement the following code, where length, a, b, c, are global variables. int length = 0; length += sprintf(buffer+length, "str%d", a); length += sprintf(buffer+length, "str%c", b); length += sprintf(buffer+length,

Hello, I have an optimisation issue in an llvm IR pass - the issue being that unnecessary instructions are generated in the final assembly (with -O3). I want to create the following assembly snippet: mov dl,BYTE PTR [rsi+rdi*1] add dl,0x1 adc dl,0x0 mov BYTE PTR [rsi+rdi*1],dl however what is created is (variant #1): mov dl,BYTE PTR [rsi+rdx*1] add dl,0x1 cmp