similar to: [LLVMdev] [PATCH] Unwanted r11 in push/pop on Cortex-M.

Hi andrea, R11 treated as frame pointer at arm backend , which is fixed again . Thanks Umesh On Tuesday, October 15, 2013, Andrea Mucignat <andrea at nestlabs.com> wrote: > Umesh, > Makes some sort of sense to me, OTOH: > If instead of choosing r11 as a "dummy" to align the stack we had chosen some other register in the range r0-r7 then we could have emitted the PUSH

Umesh, Makes some sort of sense to me, OTOH: If instead of choosing r11 as a "dummy" to align the stack we had chosen some other register in the range r0-r7 then we could have emitted the PUSH encoding T1 (2 bytes opcode) as opposed to the encoding T2 (which is a 4 bytes opcode). A On Tue, Oct 15, 2013 at 2:59 AM, Umesh Kalappa <umesh.kalappa0 at gmail.com>wrote: > Hi

Hi Andrea, That is because the LR is the fixed register as per the http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf and out_char() function is not the leaf function ,Hence compiler tends to save and restore the LR and the save and restore of register r11 is to align stack for 8 bytes as per ARM EABI. Thanks ~Umesh On Tuesday, October 15, 2013, Umesh Kalappa

Hi, I have this code: void platform_putchar(int, char); void out_char( char ch ); void out_char( char ch ) { platform_putchar (0, ch); } I'm compiling with the following clang invocation: $ /usr/local/vendor/toolchains/llvm/3.3/armv7m/bin/armv7m-none-eabi-clang -mcpu=cortex-m4 -mfloat-abi=soft -mthumb -nostdinc -ffreestanding -ffunction-sections -fdata-sections -fno-exceptions

On Wed, Jul 18, 2012 at 4:15 PM, Renato Golin <rengolin at systemcall.org> wrote: > On 18 July 2012 14:57, salvatore benedetto > <salvatore.benedetto at gmail.com> wrote: >> $ clang -march=armv7-m -mfloat-abi=soft -ccc-host-triple >> armv7m-none-gnueabi testReference.cpp -c >> fatal error: error in backend: CPU: 'cortex-m3' does not support ARM >>

Hello LLVMDev, I've encountered what looks like a bug in LLVM 2.9, it doesn't appear to be fixed in 3.0 either. The problem occurs in function ARMFrameLowering.cpp:processFunctionBeforeCalleeSavedScan. There's a circular dependency in setting the variable BigStack and AFI->setHashStackFrame(true). The expression which initializes BigStack calls estimateRSSStackSizeLimit which in

Hi Alok, Echoing Anton's statements, please provide a testcase! :) Apart from that, looking at your patch and description I actually think that it is estimateRSStackSizeLimit that is wrong. It is performing a check for a Thumb2 addressing mode whether the target has a FP register. That's the main check - for some reason it is appending another check AFI->hasStackFrame() which seems

Dear all, I don't get how llvm handles functions with __attribute__((noreturn)). It seems that LR register is backed up on the stack whilst it will never be used to return from a 'noreturn' function. I have this problem with a home-made backend but it seems that ARM flavour of clang has same behaviour. By the way, SP is also saved, I don't understand why. Is there a syntax error

Hi, I do not get your result. Do I miss something? $COMP_ROOT/clang++ --target=arm-arm-eabihf -march=armv8.2a+fp16 arm.cpp -S -o - -O3 .text .syntax unified .eabi_attribute 67, "2.09" .eabi_attribute 6, 14 .eabi_attribute 7, 65 .eabi_attribute 8, 1 .eabi_attribute 9, 2 .fpu crypto-neon-fp-armv8 .eabi_attribute 12, 4

Dear all I use arm-linux-gcc 2.95.2, because the code generated by version 3.X and 4.X can not run on SimpleScalar. So I use the arm-linux-gcc 2.95.2 *only*, the version is recommended by SimpleScalar. The code generated by arm-linux-gcc 2.95.2 can run on SimpleScalar. Now I want to use llvm/clang to generate ARM assembly code and arm-linux-gcc 2.95.2 to be assembler. Unfortunately, I got some

Simplescalar is not compatible with llvm because the binutils simplescalar is based on is ancient. Jim On Sep 26, 2012, at 12:21 AM, 陳奕梅 <ymchen at sslab.cs.nctu.edu.tw> wrote: > Dear all > > I use arm-linux-gcc 2.95.2, because the code generated by version 3.X and 4.X can not run on SimpleScalar. > So I use the arm-linux-gcc 2.95.2 *only*, the version is recommended by

Hello, am I wrong or the ARM c++ exceptions handling does not work? See the difference between assembly generated by clang and gcc with the following test code: #include <stdio.h> #include <exception> # test.cpp int main() { try { throw 20; } catch (int e) { printf("Exception Nr %d occurred\n", e); } return 0; }

I'm trying to find a way to emulate a floating point instruction, say a floating point add. My understanding is that in order to do that I need to execute setOperationAction(ISD::FADD, (MVT::f32, Expand); setOperationAction(ISD::FADD, (MVT::f64, Expand); in MyTargetISelLowering.cpp, MyTargetLowering::MyTargetLowering(...). However for some reason I'm still seeing a floating point add in

On 10 September 2010 04:47, Liu <proljc at gmail.com> wrote: > trying this: > clang -march=armv7-a -mcpu=cortex-a9 -ccc-host-triple > arm-none-linux -ccc-gcc-name arm-none-linux-gnueabi-gcc a.c Hi Liu, That doesn't work for me. $ clang -march=armv7-a -mcpu=cortex-a9 -ccc-host-triple arm-none-linux -ccc-gcc-name arm-none-linux-gnueabi-gcc alias.c clang: warning: unknown

On 18 July 2012 14:57, salvatore benedetto <salvatore.benedetto at gmail.com> wrote: > $ clang -march=armv7-m -mfloat-abi=soft -ccc-host-triple > armv7m-none-gnueabi testReference.cpp -c > fatal error: error in backend: CPU: 'cortex-m3' does not support ARM > mode execution! Ah, yes! Try: $ clang -ccc-host-triple thumbv7m-none-gnueabi testReference.cpp -c Cross

Looks like a problem with llvmc. Your example works fine with clang. ~/tmp $ cat foo.c void foo() { __asm__ volatile ("push {r4}\n\t"); } gilgamesh: ~/tmp $ clang -target arm-linux-eabi -S -Os foo.c -o - .syntax unified .eabi_attribute 20, 1 .eabi_attribute 21, 1 .eabi_attribute 23, 3 .eabi_attribute 24, 1 .eabi_attribute 25, 1 .file "foo.c" .text .globl foo

Hello, I want to compile MiBench by clang, and the target-ISA is armv4. The code generated using llvm-2.9, clang-2.9, and arm-linux-gcc (gcc version 2.95.2), simulator is sim-panalyzer 2.0.3 . I use these commends: $ clang -O3 -o hello.ll -c -emit-llvm hello.c $ llc -O3 -o hello.s -march=arm -mcpu=strongarm1100 hello.ll $ arm-linux-gcc -O3 -march=armv4 -mcpu=strongarm1100 -static

These errors are from the assembler, not LLVM. Specifically, your binutils is too old. Given that it doesn't even recognize the ".syntax" directive, they're *very* much too old. You need to upgrade. -Jim On Sep 24, 2012, at 3:31 AM, 陳奕梅 <ymchen at sslab5.cs.nctu.edu.tw> wrote: > Hello, > > I want to compile MiBench by clang, and the target-ISA is armv4. The

Hi, I am using a cross compiler to compiler for the arm5 architecture. For this architecture it is not allowed that a destination register is also used as source register. In 2007 a patch was discussed at the mailing list, however my compiler still is producing this result. Does anyone know if this patch is actually applied? * I use the following arguments: llvm-gcc -mfpu=vfp -mlittle-endian

Hello, I'm working on implementing GHC specific call convention into LLVM 2.9. I've chosen LLVM 2.9 as a kind of stable reference point and I would like to know how mature is ARM code generation chain inside this release. I've had a hope that perhaps Apple as a main sponsor of LLVM is using LLVM for their ARM based iOS software development, but I'm not sure if I'm right