similar to: [LLVMdev] Unwanted push/pop on Cortex-M.

Umesh, Makes some sort of sense to me, OTOH: If instead of choosing r11 as a "dummy" to align the stack we had chosen some other register in the range r0-r7 then we could have emitted the PUSH encoding T1 (2 bytes opcode) as opposed to the encoding T2 (which is a 4 bytes opcode). A On Tue, Oct 15, 2013 at 2:59 AM, Umesh Kalappa <umesh.kalappa0 at gmail.com>wrote: > Hi

Hi Andrea, That is because the LR is the fixed register as per the http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf and out_char() function is not the leaf function ,Hence compiler tends to save and restore the LR and the save and restore of register r11 is to align stack for 8 bytes as per ARM EABI. Thanks ~Umesh On Tuesday, October 15, 2013, Umesh Kalappa

Hi andrea, R11 treated as frame pointer at arm backend , which is fixed again . Thanks Umesh On Tuesday, October 15, 2013, Andrea Mucignat <andrea at nestlabs.com> wrote: > Umesh, > Makes some sort of sense to me, OTOH: > If instead of choosing r11 as a "dummy" to align the stack we had chosen some other register in the range r0-r7 then we could have emitted the PUSH

To recap, this is what I was trying to solve: This C code: int bar(int a, int b, int c, int d, int e, int f); int foo(int a, int b, int c, int d, int e ) { int x = 3*a; return bar3(a,b,c,d,e,x); } Produced the following assembly output: foo: push {r11, lr} sub sp, #8 bl bar add sp, #8 pop {r11, pc} The part I didn't like is that push/pop become

On Wed, Jul 18, 2012 at 4:15 PM, Renato Golin <rengolin at systemcall.org> wrote: > On 18 July 2012 14:57, salvatore benedetto > <salvatore.benedetto at gmail.com> wrote: >> $ clang -march=armv7-m -mfloat-abi=soft -ccc-host-triple >> armv7m-none-gnueabi testReference.cpp -c >> fatal error: error in backend: CPU: 'cortex-m3' does not support ARM >>

On Wed, Jul 18, 2012 at 3:52 PM, Renato Golin <rengolin at systemcall.org> wrote: > On 18 July 2012 14:33, salvatore benedetto > <salvatore.benedetto at gmail.com> wrote: >> but I still haven't figure out how to build for cortex-m3 >> >> clang -march=armv7-m -mfloat-abi=soft <something missing?> testReference.cpp -c > > -march should have done

Hi, I am trying to cross compile code for ARM Cortex m0, m3, and m4. For m0, I use: -target armv6--eabi -mcpu=cortex-m0 That seems to work. For m3 and m4, I use the following which does not work (fatal error: error in backend: CPU: 'cortex-m3' does not support ARM mode): -target armv7m--eabi -mcpu=cortex-m3 and -target armv7em--eabi -mcpu=cortex-m4 Who can help me with the

On 18 July 2012 14:33, salvatore benedetto <salvatore.benedetto at gmail.com> wrote: > but I still haven't figure out how to build for cortex-m3 > > clang -march=armv7-m -mfloat-abi=soft <something missing?> testReference.cpp -c -march should have done the trick. You can also try -mcpu=cortex-m3, or try -ccc-host-triple armv7m-none-gnueabi (or -eabi), and possibly

Hi Jan, For Cortex-M0, you should probably use the armv6m string in the target triple. For M3 and M4 you need to use the thumbv7m arch string, -mthumb won't be necessary. Amara On 11 October 2013 19:23, Jan Hoogerbrugge < jan.hoogerbrugge at biface-tools.com> wrote: > Hi, > > I am trying to cross compile code for ARM Cortex m0, m3, and m4. > > For m0, I use: > >

On 18 July 2012 14:57, salvatore benedetto <salvatore.benedetto at gmail.com> wrote: > $ clang -march=armv7-m -mfloat-abi=soft -ccc-host-triple > armv7m-none-gnueabi testReference.cpp -c > fatal error: error in backend: CPU: 'cortex-m3' does not support ARM > mode execution! Ah, yes! Try: $ clang -ccc-host-triple thumbv7m-none-gnueabi testReference.cpp -c Cross

Looks like a problem with llvmc. Your example works fine with clang. ~/tmp $ cat foo.c void foo() { __asm__ volatile ("push {r4}\n\t"); } gilgamesh: ~/tmp $ clang -target arm-linux-eabi -S -Os foo.c -o - .syntax unified .eabi_attribute 20, 1 .eabi_attribute 21, 1 .eabi_attribute 23, 3 .eabi_attribute 24, 1 .eabi_attribute 25, 1 .file "foo.c" .text .globl foo

On Wed, Jul 18, 2012 at 4:31 PM, Renato Golin <rengolin at systemcall.org> wrote: > On 18 July 2012 15:24, salvatore benedetto > <salvatore.benedetto at gmail.com> wrote: >> I'm not sure how to interpret the above output, but I don't understand >> why if say -triple armv4t-none--gnueabi . > > Ok, we're getting there... ;) Glad you are confident.

With the optimization patch I emailed, clang compiles bool f(bool *x) { return *x; } to define zeroext i1 @_Z1fPb(i8* nocapture %x) nounwind uwtable readonly { entry: %0 = load i8* %x, align 1, !tbaa !0, !range !3 %tobool = icmp ne i8 %0, 0 ret i1 %tobool } Which I think is the perfect IL if we are going to return an i1. Unfortunately, this still codegens to cmpb $0, (%rdi)

On 10 September 2010 04:47, Liu <proljc at gmail.com> wrote: > trying this: > clang -march=armv7-a -mcpu=cortex-a9 -ccc-host-triple > arm-none-linux -ccc-gcc-name arm-none-linux-gnueabi-gcc a.c Hi Liu, That doesn't work for me. $ clang -march=armv7-a -mcpu=cortex-a9 -ccc-host-triple arm-none-linux -ccc-gcc-name arm-none-linux-gnueabi-gcc alias.c clang: warning: unknown

ARM backend emits different eabi build attributes based on the ISA variant the target supports or whether certain fast-math options are passed on the command line. For example, these are the attributes that have different values depending on whether -ffast-math is passed to clang: $ clang -target armv7-linux-gnueabi -ffast-math (with -ffast-math) .eabi_attribute 20, 2 @ Tag_ABI_FP_denormal

Hi, I am trying to use LLVM/clang to build a binary for ARM Cortex M platforms. When I build my binary the linker fails to find these libraries. ./bin/clang++ -target arm-none-eabi -mcpu=cortex-m4 ./temp.cpp -L ./lib/ -L ./libexec/ -L ../build3_v7m/lib/ ld.lld: error: unable to find library -lunwind ld.lld: error: unable to find library -lc ld.lld: error: unable to find library -lm ld.lld: error:

> "/usr/bin/g++" -v -c -o testReference.o -x assembler > /tmp/testReference-Shww7Y.s > Using built-in specs. > COLLECT_GCC=/usr/bin/g++ > COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/4.6.1/lto-wrapper > Target: x86_64-linux-gnu > Configured with: ../src/configure -v --with-pkgversion='Ubuntu/Linaro > 4.6.1-9ubuntu3' >

Dear all, I don't get how llvm handles functions with __attribute__((noreturn)). It seems that LR register is backed up on the stack whilst it will never be used to return from a 'noreturn' function. I have this problem with a home-made backend but it seems that ARM flavour of clang has same behaviour. By the way, SP is also saved, I don't understand why. Is there a syntax error

Hi, I do not get your result. Do I miss something? $COMP_ROOT/clang++ --target=arm-arm-eabihf -march=armv8.2a+fp16 arm.cpp -S -o - -O3 .text .syntax unified .eabi_attribute 67, "2.09" .eabi_attribute 6, 14 .eabi_attribute 7, 65 .eabi_attribute 8, 1 .eabi_attribute 9, 2 .fpu crypto-neon-fp-armv8 .eabi_attribute 12, 4

Hi folks, As part of our build, the Tock project uses remap-path-prefix [1] to create a reproducible build. This means that the paths inside of built artifacts are not full source paths. When we later attempt to produce a listings file, the source mapping fails. The result is many copies of this recently merged warning [2]: llvm-objdump: warning: