similar to: [LLVMdev] Tblgen and computed expressions

Thanks again Elior, Yes, I tried using '!if', etc. but I just get type mismatches for the initializer (int) - probably something daft I'm doing :-( MartinO -----Original Message----- From: Malul, Elior [mailto:elior.malul at intel.com] Sent: 29 September 2013 09:19 To: Martin.ORiordan at movidius.com; llvmdev at cs.uiuc.edu Subject: RE: [LLVMdev] Tblgen and computed expressions

Thanks Elior, Sorry for the delay - emergencies never seem to go away in compiler development ;-) That sounds like an interesting approach, a kind-of pre-processor for TD files. But will this still not result in a constant, although externally provided, or have I misunderstood? What I would like to do is compute a different value depending on which '-target-cpu <cpu>' option was

Martin hi. I encountered a similar problem, and made a solution for it. The solution is a tblgen enhancement, and enables tblgen code expressions to be dynamically evaluated. It works as follows: 1. Code expressions have 'special runtime evaluation' expression (very similar to strings in ruby), e.g.: code c = {[ My name is #{injected}. }. 2. I have added another command line switch for

Hi LLVMDev, I am revising an existing LLVM backend for a new variant of our CPU architecture. I have looked at other targets, and the approach used by Hexagon seems to suit most of my needs quite well, so I am using Predicates to enable/disable instructions for the architectures. This works very well for disabling old instructions, and enabling new instructions. For the remaining instructions

----- Original Message ----- > From: "Elior Malul" <elior.malul at intel.com> > To: "Michael Gottesman" <mgottesman at apple.com>, "Hal Finkel" <hfinkel at anl.gov> > Cc: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Sent: Thursday, February 14, 2013 8:33:42 AM > Subject: RE: [LLVMdev] SIMD

Thanks again for your help Steve, I’m thinking perhaps my “SelectADDRrr” pattern is inadequate. The sign-extension is at the hardware level, the code generator sees (should see) it as a 16-bit signed register value. My implementation is just: bool SHAVEISelDAGtoDAG::SelectADDRrr(SDValue &Addr, SDValue &Base, SDValue &Offset) { if ((Addr.getOpcode() == ISD::ADD) { Base

I've no idea, but without it, the 'std::to_string' definitions are not enabled! -----Original Message----- From: Renato Golin [mailto:renato.golin at linaro.org] Sent: 06 July 2016 19:35 To: Martin.ORiordan at movidius.com Cc: LLVM Developers <llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] GCC prerequisites for building LLVM head? On 6 July 2016 at 19:02, Martin J.

Thanks for the quick answer Bruce. So far as I can tell (from a quick read), this is really for integrated assemblers/disassemblers - but we use an external assembler. When invoking clang we would provide ‘-mcpu=chip_v1’ or ‘-mcpu=chip_v2’, and the mnemonic ‘LD32’ is only valid when compiling for ‘chip_v1’, while ‘LD.32’ is only valid when compiling for ‘chip_v2’. But I will study the

On Mon, Jun 26, 2017 at 5:04 AM, ORiordan, Martin <martin.oriordan at intel.com > wrote: > Thanks Sean and Silva. > > > > I guess what I was seeking was a URL that I could point (non-compiler) > people at, but I guess no such reference exists. What I can do if > reference bot the source manager and use ‘-mllvm -debug-pass=Structure’ > for each optimisation level,

Thanks :) From: 陳韋任 [mailto:chenwj.cs97g at g2.nctu.edu.tw] Sent: 14 April 2017 12:53 To: Martin J. O'Riordan <martin.oriordan at movidius.com> Cc: LLVM Developers <llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] Options for timing passes in LLVM? Refer to `llc` document [1], it would be `--time-passes`. [1] http://llvm.org/docs/CommandGuide/llc.html HTH,

Hi all, my name is Elior Malul, and Intel employee, and it is the first time I'm writing to the llvm-dev community. The purpose of that mail is a 'recon-mission' on a small tblgen feature I think might prove itself useful. I would like to add a built-in types 'pair'. Pair is a compound type with two template argument: pair<ty1, ty2>; The idea is to add a literal for that

Sorry for the delay, I had to experiment and build everything to be sure. I am actually getting the same problem with GCC v4.9.3 on CentOS, but for both Cygwin and Linux adding '-D_GLIBCXX_USE_C99' to the '-DCMAKE_CXX_FLAGS:STRING=' flag during configuration cured the problem. MartinO -----Original Message----- From: Renato Golin [mailto:renato.golin at linaro.org] Sent: 06

Thanks Ahmed and also Alex for your replies. This is more or less what I was realising, but it is a great confidence booster to know that it is the correct way also. I can replace all of my various 'Select*' specialisations with version that use 'ReplaceNode/SelectCode' and return 'void', but what about the places where I currently call 'Select(N)' directly?

I was investigating an error diagnostic in the following test example: typedef signed char char16 __attribute__((ext_vector_type(16))); void test( char16 srcA, char16 srcB, char16 *dst) { *dst = ( srcA == srcB ); } which produces the message: mismatch.c:5:10: error: assigning to 'char16' from incompatible type 'char __attribute__((ext_vector_type(16)))' *dst = (

I just checked with '-E' and I am picking up '<string>' from: /usr/lib/gcc/i686-pc/cygwin/4.9.3/include/c++/string all other C++ headers are coming from the same place. The 'std::to_string' functions are not present in '<string>', but they are located in '<bits/basic_string.h>' - which is included. Perhaps it is a broken Cygwin

Hi LLVM and CLang Devs, At the moment my company (Movidius) is considering contributing the changes we have made to LLVM and CLang in order to support our proprietary processor, and I would like to seek advice on how best to approach doing this? I am pretty sure that there are coding guidelines and conventions that we should be following but have not followed over the course of the last few

Hi Martin, On Oct 2, 2013, at 6:25 AM, Martin O'Riordan <Martin.ORiordan at movidius.com> wrote: > I was investigating an error diagnostic in the following test example: > > typedef signed char char16 __attribute__((ext_vector_type(16))); > > void test( char16 srcA, char16 srcB, char16 *dst) { > *dst = ( srcA == srcB ); > } > > which produces the

Hi Mehdi and my apologies for the delay in responding - the day job got in the way :-) Our target is still out-of-tree so my reasons for extending the IR would be eliminated if we were a proper part of LLVM, which I would like to do when the time is right for us. My extensions are quite simple really, and I expect that they will be wanted in the TRUNK sometime anyway. At the moment I only have

"Martin J. O'Riordan" <martin.oriordan at movidius.com> writes: > Thanks Ahmed and also Alex for your replies. > > This is more or less what I was realising, but it is a great > confidence booster to know that it is the correct way also. I can > replace all of my various 'Select*' specialisations with version that > use

It occurred to me that instead of the various breakout 'Select*' functions returning the 'SDNode*' result, maybe I should be calling: ReplaceNode(N, newValue); return; or: SelectCode(N); return; Perhaps? MartinO From: Martin J. O'Riordan [mailto:martin.oriordan at movidius.com] Sent: 28 June 2016 16:49 To: 'LLVM Developers'