Displaying 20 results from an estimated 8000 matches similar to: "[LLVMdev] Related to the LLVM Intrinsic functions."
2013 Oct 09
4
[LLVMdev] Related constant folding of floating point values
Hi all,
I have the following test case:
#define FLT_EPSILON 1.19209290E-7
int err = -1;
int main()
{
float a = 8.1;
if (((a - 8.1) >= FLT_EPSILON) || ((a - 8.1) <= -FLT_EPSILON)) { //I am
using FLT_EPSILON to check whether (a != 2.0).
err = 1;
} else {
err = 0;
}
return 0;
}
with -O3 optimization level clang generates already incorrect LLVM IR:
; Function Attrs:
2014 Jun 20
3
[LLVMdev] Passing specific register for an Instruction in target description files.
Hi all,
I want to generate an assembly instruction for my target using target
description representation of the instruction. The problem is that I want to
add direct register to be chose as an output register for my target. Does it
possible to do with an instruction definition in TARGETInstrInfo.td file?
May be someone could help with an example?
Currently I have seen that we can pass the name
2013 Sep 25
0
[LLVMdev] Related to the LLVM Intrinsic functions.
Arsen Hakobyan wrote:
> Hello,
>
> I have a need to change the parameter type of llvm.lifetime.start/end
> intrinsic functions to get other defined type, but i do not want to replace
> the current definition of the intrinsic function with the new definition. Is
> there a way, to do such things for a specific target?
> If the only way to do this is to create a separate file for
2014 Jul 02
2
[LLVMdev] Passing specific register for an Instruction in target description files.
On Mon, Jun 30, 2014 at 02:40:43AM -0700, Quentin Colombet wrote:
> Hi Arsen,
>
>
> > On Jun 19, 2014, at 10:43 PM, Arsen Hakobyan <artinetstudio at gmail.com> wrote:
> >
> > Hi all,
> >
> > I want to generate an assembly instruction for my target using target
> > description representation of the instruction. The problem is that I want to
2014 Aug 14
2
[LLVMdev] Tablegen: How to define a Pattern with multiple result instructions
Hi all,
I would like to be sure that Tablegen still does not support completely
separate multiple instruction generation, and the only way is to write
costume code (may be in TargetISelDAGToDAG class) to get the needed result.
Dear Tom, do you found other solution (using Tablegen tool) for this?
Thanks,
Arsen
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2014 Aug 15
2
[LLVMdev] Tablegen: How to define a Pattern with multiple result instructions
Dear Tom,
What is the advantage to use the “pseudo instruction” approach VS “custom lowering/DAGtoDAGSelection” VS “ Library function”?
Best
Kevin
On Aug 14, 2014, at 9:27 AM, Tom Stellard <tom at stellard.net> wrote:
> On Thu, Aug 14, 2014 at 12:05:33AM -0700, Arsen Hakobyan wrote:
>> Hi all,
>>
>> I would like to be sure that Tablegen still does not support
2013 Oct 09
0
[LLVMdev] Related constant folding of floating point values
Hi Arsen,
On Oct 9, 2013, at 4:53 AM, Arsen Hakobyan <artinetstudio at gmail.com> wrote:
> Hi all,
>
> I have the following test case:
> #define FLT_EPSILON 1.19209290E-7
>
> int err = -1;
> int main()
> {
> float a = 8.1;
> if (((a - 8.1) >= FLT_EPSILON) || ((a - 8.1) <= -FLT_EPSILON)) { //I am
> using FLT_EPSILON to check whether (a != 2.0).
2014 Jul 09
3
[LLVMdev] Signed/Unsigned Instruction selection.
The sign information for binary operators is available in the llvm IR by the
'nsw' (no signed wrap) flag. Seems there is no use of this flag in the code
generation phase.
The sign information is no more available in the selection DAG.
So how can I generate different instructions for binary operators with
signed/unsigned operands in the assembler (e.g. mul/mulu)?
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2014 Aug 05
2
[LLVMdev] Concerning not relevant argument count in TableGen Patterns.
Dear all.
I have a problem with the following situation:
I want to handle an intrinsic function in a specific way. The prototype of
my function is: "/int my_intrinsic_name()/"
So I want to generate a move instruction which should use two register type
operands: "/mov R1, R2/"
For this purpose I assume that the instruction definition in the
TargetInstrInfo.td file
2018 Jan 12
2
StripDeadDebugInfo for static inline functions.
Hi Arsen, we are beyond what I understand about how metadata operates. Maybe Adrian or David knows.
--paulr
From: Arsen Hakobyan [mailto:hakobyan.ars at gmail.com]
Sent: Friday, January 12, 2018 12:16 PM
To: Robinson, Paul
Cc: llvm-dev at lists.llvm.org; David Blaikie
Subject: Re: [llvm-dev] StripDeadDebugInfo for static inline functions.
Just one update:
the function causing the segmentation
2018 Jan 14
0
StripDeadDebugInfo for static inline functions.
Thanks Paul,
Hi Adrian and David I would really appreciate any comments, thoughts
assumptions.
If additional information is needed please let me know.
Regards,
Arsen
On Sat, Jan 13, 2018 at 2:54 AM, Robinson, Paul <paul.robinson at sony.com>
wrote:
> Hi Arsen, we are beyond what I understand about how metadata operates.
> Maybe Adrian or David knows.
>
> --paulr
>
>
2018 Jan 15
1
StripDeadDebugInfo for static inline functions.
+ Adrian
+ David
Hi Arsen,
This sounds like a bug to me. Have you tried reproducing it on trunk? For instance, I see that the relation between DICompileUnit and DISubprogram was changed in the meantime (https://reviews.llvm.org/D19034 <https://reviews.llvm.org/D19034>).
If this no longer occurs on master you could bisect the compiler to find the commit(s) that fix this and consider
2018 Jan 12
0
StripDeadDebugInfo for static inline functions.
Just one update:
the function causing the segmentation fault is the following:
359 void DwarfDebug::constructAbstractSubprogramScopeDIE(LexicalScope
*Scope) {
360 assert(Scope && Scope->getScopeNode());
361 assert(Scope->isAbstractScope());
362 assert(!Scope->getInlinedAt());
363
364 const MDNode *SP = Scope->getScopeNode();
365
366
2018 Jan 12
2
StripDeadDebugInfo for static inline functions.
Hi Paul,
Thanks for your response.
Let me actually post more details visualizing my case. Assuming that can
help.
so the IR before the opt tool is running is:
; Function Attrs: nounwind
define i16 @main() #0 !dbg !13 {
entry:
%retval = alloca i16, align 1
...
}
; Function Attrs: inlinehint nounwind
define internal void @delay(i16 %d) #4 !dbg !69 {
entry:
%d.addr = alloca i16,
2014 Nov 29
2
[LLVMdev] LLVM Back-End structur related question.
Hi everyone,
How would you pass a string container from TargetISelLowering phase to the
TargetInstPrinter phase?
May be I have missed something essential, but currently seems they don't
have shared class or something like that, and currently I am thinkin to
initialize container in TargetTargetMachine, then pass it to the
TargetInstPrinter using TargetMCAsmInfo class or something like this. I
2013 Apr 12
2
[LLVMdev] Control Dependence Graph builder
Hello All,
I am interested in Control Dependence Graph building using the CFG and
Dominance Frontier provided by corresponding passes. Just wandering whether
LLVM provides some kind of pass or builder which will generate the Control
Dependence Graph?
Thanks,
Arsen
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2018 Jan 12
2
StripDeadDebugInfo for static inline functions.
Hi all,
I would like to understand the strip-dead-debug-info transformation.
In my test case there is a static inline function with two local variables.
It appears that the function is already inlined before
strip-dead-debug-info starts its work. As a result the DICompileUnit is
cleaned and its subprograms list has no reference to the DISubprogram for
the inlined function, but as there is
2018 Jan 12
0
StripDeadDebugInfo for static inline functions.
I'm not as familiar with all the ins and outs of metadata as maybe I should be, but ultimately the inlined function should have a DWARF description contained within the description of the caller (which is why you're seeing the call to constructAbstractSubprogramScopeDIE). That suggests that the DISubprogram for the inlined function ought to remain, and its scope should be the
2013 Apr 12
0
[LLVMdev] Control Dependence Graph builder
On 4/12/13 3:19 PM, Arsen wrote:
> Thank you John.
> Actually the opt tool (from LLVM 3.2 version) can generate the needed graphs
> (with pass "-domfrontier").
> But I just want to surely know is there some pass or builder which can be
> integrated somehow so it will be possible directly to generate CDG?
Yes and no. There's isn't a control dependence pass in LLVM
2012 Nov 05
2
[LLVMdev] LLVM Value relationship with metadata
Hello All,
Would anybody explain why there is not direct connection between llvm::Value
and metadata nodes. If llvm::Value hold pointer to its MDNode would it cause
any malfunctioning?
Thanks in advance,
Arsen
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