similar to: [LLVMdev] Translation between MCInst and Binary Executable

Displaying 20 results from an estimated 6000 matches similar to: "[LLVMdev] Translation between MCInst and Binary Executable"

2013 Sep 18
2
[LLVMdev] Translation between MCInst and Binary Executable
Hi, Dear LLVM Dev Group, I am doing an LLVM project aimed to disassemble an ARM ELF binary executable to the MCInst format, inserting some instructions or doing some modification, and re-assemble the MCInst to an ELF binary. As I used the llvm-mc, it seems to only have the option "llvm-mc -disassemble", which reads strings and output strings. Is there any command or function that can
2013 Sep 15
0
[LLVMdev] LLVM disassembler bugs
Test case attached. It is not a test case that works within the llvm test-suite yet, but it does demonstrate the problem. I would like some advice on how to modify this test_case so that it can be added to the automated llvm test cases. On 15 September 2013 23:02, David Majnemer <david.majnemer at gmail.com> wrote: > The attached patch includes no test-case and isn't consistent
2013 Sep 15
2
[LLVMdev] LLVM disassembler bugs
The attached patch includes no test-case and isn't consistent with the rest of the file: - constants should be on the right hand side of comparisons - the braces around your single line 'if' aren't needed. On Sun, Sep 15, 2013 at 2:39 PM, James Courtier-Dutton < james.dutton at gmail.com> wrote: > I attach a patch that fixes this bug. Applies to llvm 3.4svn > >
2013 Mar 16
0
[LLVMdev] Simple question
You can't. You have to use the value 12 directly. On 16 March 2013 00:18, James Courtier-Dutton <james.dutton at gmail.com>wrote: > > On Mar 15, 2013 10:53 PM, "Óscar Fuentes" <ofv at wanadoo.es> wrote: > > > > James Courtier-Dutton <james.dutton at gmail.com> writes: > > > > > I think this is a very simple question, and it must
2013 Aug 26
1
[LLVMdev] LLVM Disassembler question
Hi, By way of example, I have the following instruction: 44 8b 80 c8 03 00 00 movl 968(%rax), %r8d 1) How is this represented in MCInst? 2) Is there information in MCInst that would tell me which bytes of the instruction are responsible for the 968? The reason I am asking is that I want to work with the bytes disassembled/decoded to an instruction at MCInst level.
2009 Jul 10
0
[LLVMdev] MCInst
On Jul 9, 2009, at 5:34 PM, David Greene wrote: > Can someone explain what MCInst is vs. MachineIntr? Sure. MCInst is designed to be part of the "MC" set of libraries, which is stuff dealing with machine code. We're building a suite of assemblers and disassemblers out of this. MCInst is integral to this plan. For an assembler you have two pieces: 1. "Recognize"
2013 Sep 15
0
[LLVMdev] LLVM disassembler bugs
I attach a patch that fixes this bug. Applies to llvm 3.4svn Please commit it please. Kind Regards James On 13 September 2013 17:46, James Courtier-Dutton <james.dutton at gmail.com>wrote: > Hi, > > I am looking at the "LLVMOpInfoCallback GetOpInfo" callback. > > Example 1 GOOD: > 41 c6 84 24 16 04 00 00 0c : movb $12, 1046(%r12) > > Makes
2012 May 07
0
[LLVMdev] Using LLVM for decompiling.
> -----Original Message----- > On Behalf Of James Courtier-Dutton > To: John Criswell > > On 7 May 2012 16:31, John Criswell <criswell at illinois.edu> wrote: > > On 5/7/12 5:47 AM, James Courtier-Dutton wrote: > >> > >> Hi, > >> > >> I am writing a decompiler. I was wondering if some of LLVM could be > >> used for a
2013 Mar 16
3
[LLVMdev] Simple question
On Mar 15, 2013 10:53 PM, "Óscar Fuentes" <ofv at wanadoo.es> wrote: > > James Courtier-Dutton <james.dutton at gmail.com> writes: > > > I think this is a very simple question, and it must just be missing something. > > > > I am looking for find out how to assign a constant integer value to > > the variable in llvm ir. > > > > The
2012 Dec 26
0
[LLVMdev] Getting MCInst "ins" and "outs"
The MCInstrDesc has a method getNumDefs() which tells you how many 'out registers' that MCInst has. The 'out' registers are always at the beginning of the list. You can also use getNumOperands(). Not sure if this is what you are looking for. -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Vladimir Pouzanov
2013 Mar 15
0
[LLVMdev] Simple question
On Mar 15, 2013, at 3:08 PM, James Courtier-Dutton <james.dutton at gmail.com> wrote: > Hi, > > I think this is a very simple question, and it must just be missing something. > > I am looking for find out how to assign a constant integer value to > the variable in llvm ir. > > The following returns 12, and %var2 = 12. > ; ModuleID = 't.c' > target
2013 Mar 15
0
[LLVMdev] Simple question
James Courtier-Dutton <james.dutton at gmail.com> writes: > I think this is a very simple question, and it must just be missing something. > > I am looking for find out how to assign a constant integer value to > the variable in llvm ir. > > The following returns 12, and %var2 = 12. > ; ModuleID = 't.c' > target datalayout = >
2013 Oct 29
2
[LLVMdev] Missed optimization opportunity with piecewise load shift-or'd together?
On Mon, Oct 28, 2013 at 10:09 AM, James Courtier-Dutton <james.dutton at gmail.com> wrote: > My guess is that this is a missed optimization, but in real life, all > projects i have worked fix this in the C or C++ code using macros that > change what instructions are used based on target platform and its > endedness. One reason for writing code like this, i.e. explicitly spelling
2013 Jun 28
0
[LLVMdev] Question regarding the x86 SBB instruction.
Look at the __builtin_addc* builtins in clang. I am currently working on an optimization which transforms said intrinsics into chains of ADCs/SBBs. Michael On Jun 28, 2013, at 5:51 AM, James Courtier-Dutton <james.dutton at gmail.com> wrote: > Hi, > > I have the x86 SBB instruction. how should I represent this in LLVM > IR. (as part of a decompiler from binary to LLVM IR)
2014 Mar 12
2
[LLVMdev] Hazard recognition using MCInst
Dear All, I am following a flow to generate object files(.o) from input (.s assembly) files. The input .s is given to AsmParser, which creates MCInst after matching instruction opcode. These MCInst are converted to MCStream and then finally emitting to an object file using Target Code Emitter. I am considering whether hazard recognition can be done on the list of MCInst, which I get after
2009 Jul 10
1
[LLVMdev] MCInst
On Friday 10 July 2009 00:19, Chris Lattner wrote: > asmprinter::printInstruction will lower a MachineInstr to an MCInst, > then call the MCInst asmprinter to do the hard formatting work. You > can see a horrible simple skeleton of this idea in > X86ATTAsmPrinter::printMachineInstruction. Yep, that's where I hit the problem. I'm patching the sources for the comment emitter
2012 Dec 26
1
[LLVMdev] Getting MCInst "ins" and "outs"
Hi, Am Mittwoch, 26. Dezember 2012, 15:20:27 schrieb Manny Ko: > The MCInstrDesc has a method getNumDefs() which tells you how many 'out > registers' that MCInst has. The 'out' registers are always at the beginning > of the list. You can also use getNumOperands(). I've run into the problem, that this doesn't work for instructions which have variadic arguments
2013 Oct 29
0
[LLVMdev] Missed optimization opportunity with piecewise load shift-or'd together?
----- Original Message ----- > On Mon, Oct 28, 2013 at 10:09 AM, James Courtier-Dutton > <james.dutton at gmail.com> wrote: > > My guess is that this is a missed optimization, but in real life, > > all > > projects i have worked fix this in the C or C++ code using macros > > that > > change what instructions are used based on target platform and its >
2020 Jun 30
2
How to prevent llvm's default optimization
Hi, James, Thanks for your reply. I do not think it is always true, that "mul then add" is faster than "add then mul". For example, A small immediate can be directly encoded in the instruction, but it becomes a larger one after a multiplication, which has to be loaded from the constant pool (extra memory access). So I wonder, is it possile to prevent it, via changes
2013 Sep 12
0
[LLVMdev] MCInst uniqueness
Hi, I have a question regarding each MCInst. When converting from MCInst to encoded machine code octets, is it possible for an MCInst to produce more than one different set of octets depending on the operands being different? I.e. is there a one to one relationship between MCInst and the encoded machine code bytes? Kind Regards James -------------- next part -------------- An HTML attachment