similar to: [LLVMdev] JIT compiled intrinsics calls is call to null pointer

Hi Andrew, this sounded a plausible explanation, because the X86 processor does not have an instruction to calculate the power function. So I tried the llvm.sin.f32 intrinsic, as the X86 processor family does have an instruction for that, but I still get the same problem. While you may still be right, there is at least something else going on as well. Thanks for your input, though. Taco.

Hi all, Recently I have implemented a transformation pass based on LLVM3.5 and its function is to duplicate the function's argument list in a bytecode file and replace all use of original function with modified function. In LLVM3.5, the pass can work properly. However, when I tried to transplant the pass to LLVM3.9, the error "Argument value does not match function argument type!"

Hi, I am deciding on what 'RHEL clone' to use and prefer to use one that has a quick release after RedHat releases an update. I checked the repositories, but have not encountered any of the latest errata. Am I looking at the wrong place ? Thanks, Taco

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Hi all, I'm having trouble understanding how llvm determines if pointers alias. Consider the following two functions that each do a redundant load: define float @A(float * noalias %ptr1) {   %ptr2 = getelementptr float* %ptr1, i32 1024   %val1a = load float* %ptr1   store float %val1a, float* %ptr2   %val1b = load float* %ptr1   ret float %val1b } define float @B(float * noalias %ptr1,

Hi all, I have this problem: I'm using LLVM's C++ API, mostly `IRBuilder<>` to generate code. Some of the generated code is just storing constant data to a location provided as a function argument. Something like `ir_builder.CreateStore(get_default_data(), ptrValue)` where `get_default_data()` may return a `ConstantArray` of `i8` and `ptrValue` is a function argument. Looking

I performed an experiment in which I had dhcpd specify a named file ("foo") instead of one based on a client's MAC address. Lo and behold, the same problem occured. The PXE stack requested and was served the right file, the kernel loaded as did the initrd. But again, the boot sequence stopped at "Ready." Keep in mind that the contents of the file are the same as was in the

On Fri, Oct 7, 2011 at 2:15 PM, andrew adams <andrew.b.adams at gmail.com> wrote: > Hi all, > > I'm having trouble understanding how llvm determines if pointers > alias. Consider the following two functions that each do a redundant > load: > > define float @A(float * noalias %ptr1) { >   %ptr2 = getelementptr float* %ptr1, i32 1024 >   %val1a = load float*

If that doesn''t work, then you''ve done something wrong somewhere. ''Cause it works for IE for me and everyone else. The only advantage I see with the YUI toolkit is that it''ll defer attaching events to elements that do not yet exist in the DOM. Big whoop, only a sloppy programmer would try to attach an event to a non-existant element. With Prototype, you can

Hello, Depending on how I extract integer lanes from an x86_64 xmm register, the backend may spill that register in order to load scalars. The effect was observed on two targets: corei7-avx and btver1 (I haven't checked other targets). Here's a test case with spilling/no-spilling code put on conditional compile: #if __SSE4_1__ != 0 #include <smmintrin.h> #else #include

I wanted to use LLVM for my math parser but it seems that floating point optimizations are poor. For example consider such C code: float foo(float x) { return x+x+x; } and here is the code generated with "optimized" live demo: define float @foo(float %x) nounwind readnone { entry: %0 = fmul float %x, 2.000000e+00 ; <float> [#uses=1] %1 = fadd float %0, %x

When I compile attached IR with LLVM 3.6 llc -march=x86-64 -o f.S f.ll it generates an aligned ADDPS with unaligned address. See attached f.S, here an extract: addq $12, %r9 # $12 is not a multiple of 4, thus for xmm0 this is unaligned xorl %esi, %esi .align 16, 0x90 .LBB0_1: # %loop2

Hello everyone, I have recently discovered the LLVM project and have to say that it looks impressively interesting so far. Kudos to all developers for the good work. However, I am afraid I have a few newbie questions that I have been unable to resolve browsing the documentation. I am evaluating the use of LLVM with respect to a feasibility study for a project. For this project I need to be

Hi all, I'm trying to generate code containing an ordered float compare for equality, and select. The resulting code however has an unordered compare and some Boolean logic that I think could be eliminated. In C syntax the code looks like this: float x, y; int a, b, c if(x == y) // Rotate the integers { int t; t = a; a = b;

Hello guys, Thanks for your help when you are busing. I am working on an open source project. It supports shader language and I want JIT feature, so LLVM is used. But now I find the ABI & Calling Convention did not co-work with MSVC. For example, following code I have: struct float4 { float x, y, z, w; }; struct float4x4 { float4 x, y, z, w; }; float4 fetch_vs( float4x4* mat

This load instruction assumes the default ABI alignment for the <4 x float> type, which is 16: %15 = load <4 x float>* %14 You can set the alignment of loads to something lower than 16 in your frontend, and this will make LLVM use movups instructions: %15 = load <4 x float>* %14, align 4 If some LLVM mid-level pass is introducing this load without proving that the vector is

Both ZF and PF will be set if unordered, so the code below is IEEE correct...you want to generate 'fcmp ueq' instead of 'fcmp oqe' This is the resulting x86 assembly code: movss xmm0,dword ptr [ecx+4] ucomiss xmm0,dword ptr [ecx+8] sete al setnp dl test dl,al mov edx,edi cmovne edx,ecx cmovne ecx,esi cmovne

Hi everyone, I have some problems with gettings the X86_thiscall calling convention to work. I am new to LLVM, so if this is the wrong place for this question then I appologise, please tell me where to go instead. I am generating code to call a member function of a class compiled with Microsoft Visual C++ using the JIT compiler. The following code is used to register the pointer to the

Using the LLVM C++ API, if I want to create an array via an Alloca instruction like: Value *a = ir_builder.CreateAlloca( my_type, my_size ); and then I want to initialize each element of the array with values computed elsewhere like: for ( vector<Value*>::const_iterator i = v.begin(); i != v.end(); ++i ) { builder.CreateStore( *i, a ); // How do I increment 'a' to point to

And also the resulting assembly code is very poor: 00460013 movss xmm0,dword ptr [esp+8] 00460019 movaps xmm1,xmm0 0046001C addss xmm1,xmm1 00460020 pxor xmm2,xmm2 00460024 addss xmm2,xmm1 00460028 addss xmm2,xmm0 0046002C movss dword ptr [esp],xmm2 00460031 fld dword ptr [esp] Especially pxor&and instead of movss (which is