similar to: [LLVMdev] Optimisation pass to move an alloca'd array to a global constant array

Hi, I have been trying to move some instructions between basic blocks , After looking at the API , I found llvm::Instruction::clone() but there is no result value for this. For example- source Basic block : continuation: ; preds = %else, %then %iftmp = phi i32 [ 5, %then ], [ 9, %else ] store i32 %iftmp, i32* %datasize ; 3 instructions below

Hi, all I'd like to write a code that can build different codes based on LLVM version. Like code snippets in the below. #ifdef __LLVM_29__ PHINode *PN = Builder.CreatePHI (Type::getDoubleTy(getGlobalContext()), 2, "iftmp"); #elif __LLVM_28__ PHINode *PN = Builder.CreatePHI (Type::getDoubleTy(getGlobalContext()), "iftmp"); #else assert ("wrong

Hello, I'm doing some Def/Use analysis, and I'm hung up on one tricky spot. The BB in question is attached. Ignore the red. The issue is that '%13 = load...' instruction does not show up as a Use for the '%scevgep25' definition, and I feel like it should. Instead, it shows up as a Use for '%iftmp.55.0 = select...', though Operand(0) for this '%13 =

I was trying to run the simplify CFG Pass in LLVM , and delete an unreachable basic block ("continuation" below ) after running one of my own IR transforms , but I keep getting the error - While deleting: i8* %g Use still stuck around after Def is destroyed: store i8 0, i8* %g I am well aware of what that means, but isn't the whole purpose of the "simplifyCFGPass" to

Here's an initial stab, but I'm not too happy about the temporarily adding new instructions then removing it because returning it will have it added back in to replace other uses. I also added a couple test cases pass with the new InstructionCombining changes (the old code only passes one of the added tests). Also, this change exposes some simplification for

Dear All, I have, in an LLVM bitcode program, the following phi node: %iftmp.225.0 = phi i8* [ getelementptr ([10 x i8]* @.str12597431, i32 0, i32 0), %bb114 ], [ getelementptr ([10 x i8]* @.str1258, i32 0, i32 0), %bb111 ], [ getelementptr ([10 x i8]* @.str1258, i32 0, i32 0), %bb111 ] This phi instruction has two arguments for the same incoming basic block. The only reason why it passes

On Mar 17, 2009, at 11:37 AMPDT, John Criswell wrote: > Dear All, > > I have, in an LLVM bitcode program, the following phi node: > > %iftmp.225.0 = phi i8* [ getelementptr ([10 x i8]* @.str12597431, > i32 0, > i32 0), %bb114 ], [ getelementptr ([10 x i8]* @.str1258, i32 0, i32 > 0), > %bb111 ], [ getelementptr ([10 x i8]* @.str1258, i32 0, i32 0), > %bb111 ]

Hi, I have this piece of code: tm = local ? localtime(&curr) : gmtime(&curr); if (!tm) return NULL; which translates into something like: ---------------------------------------------- entry: %iftmp.0 = alloca %struct.tm*, align 8 %tm = alloca %struct.tm*, align 8 ... // Declares iftmp.0 as iftmp.0 call void @llvm.dbg.declare( { }* %iftmp.0, { }* bitcast

Stack colouring should be able to reuse the same stack space, if the live ranges of the pointers don't overlap. But I don't think anyone has built a general solution for alloca'd space. On Mon, Nov 4, 2013 at 6:30 AM, Ali Javadi <aj14889 at yahoo.com> wrote: > Hi, > > In my llvm code I want to create some function calls. The function > prototype is as follows: >

Hi, In my llvm code I want to create some function calls. The function prototype is as follows: int memoize ( char *function_name, int *int_params, unsigned num_ints, double *double_params, unsigned num_doubles) In order to create these calls I do the following for example: %88 = alloca [7 x i8] store volatile [7 x i8] c"ORACLE\00", [7 x i8]*

Hi all, I'm trying to implement a floating-point 'min' and 'max' operation using select. For 'min' I get the expected x86 assembly minss instruction, but for 'max' I get a branch instead of maxss. The corresponding C syntax code looks like this: float z = (x > y) ? x : y; Any clues? Could someone maybe explain to me the basics of

instcombine can handle certain orders of "icmp"s that are "or"ed together: x != 5 OR x > 10 OR x == 8 becomes.. x != 5 OR x == 8 becomes.. x != 5 However, a different ordering prevents the simplification: x == 8 OR x > 10 OR x != 5 becomes.. %or.eq8.gt10 OR x != 5 and that can't be simplified because we now have an "or" OR "icmp". What would I

Hi Evan, all, The most obvious thing to me would be to extend the load instruction to have an additional form that takes a vector of pointers instead of a single pointer. This form would return a vector of values instead of a single value. If a gather instruction is not available on the target, then the load could be lowered to a series of scalar loads and insertelements. Thanks, Nick On

Kangkook Jee <aixer77 at gmail.com> writes: > Hi, all > > I'd like to write a code that can build different codes based on LLVM version. > Like code snippets in the below. > > #ifdef __LLVM_29__ > PHINode *PN = Builder.CreatePHI (Type::getDoubleTy(getGlobalContext()), 2, "iftmp"); > #elif __LLVM_28__ > PHINode *PN = Builder.CreatePHI

Hi All, I was in the process of implementing a gathering load for my language. I got the getelementptr vector form working. However there doesn't seem to be a way to load a vector of values using the vector of pointers from getelementptr. Am I correct that this is not possible with LLVM IR currently (apart from with the avx2 gather intrinsic)? And if so, are there plans to allow

The frontend code is a pretty simple for loop, that counts from i = 0; i != 10; i += 1 It gets optimized into and endless loop. export fn entry() void { var array: [10]Bar = undefined; var x = for (array) |elem, i| { if (i == 1) break elem; } else bar2(); } Here's the generated IR: ; ModuleID = 'test' source_filename = "test" target datalayout =

Currently virtio-net code relys on the layout of descriptor, this patchset removed the assumptions and introduced a control command to set mac address. Last patch is a trivial renaming. V2: check guest's iov_len V3: fix of migration compatibility make mac field in config space read-only when new feature is acked V4: add fix of descriptor layout assumptions, trivial rename V5: fix

Currently virtio-net code relys on the layout of descriptor, this patchset removed the assumptions and introduced a control command to set mac address. Last patch is a trivial renaming. V2: check guest's iov_len V3: fix of migration compatibility make mac field in config space read-only when new feature is acked V4: add fix of descriptor layout assumptions, trivial rename V5: fix

From: Amos Kong <akong at redhat.com> Currently virtio-net code relys on the layout of descriptor, this patchset removed the assumptions and introduced a control command to set mac address. Last patch is a trivial renaming. V2: check guest's iov_len V3: fix of migration compatibility make mac field in config space read-only when new feature is acked V4: add fix of descriptor layout

From: Amos Kong <akong at redhat.com> Currently virtio-net code relys on the layout of descriptor, this patchset removed the assumptions and introduced a control command to set mac address. Last patch is a trivial renaming. V2: check guest's iov_len V3: fix of migration compatibility make mac field in config space read-only when new feature is acked V4: add fix of descriptor layout