Displaying 20 results from an estimated 900 matches similar to: "[LLVMdev] redundant code in Mips arch?"
2013 Aug 23
0
[LLVMdev] redundant code in Mips arch?
forgot to mention: this is from file MipsGenDisassemblerTables.inc
thanks.
On Fri, Aug 23, 2013 at 2:12 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
> hi,
>
> there are two arrays named DecoderTable32[] and DecoderTable16[] that has
> no reference to. any idea why they are there? does it make sense to remove
> them?
>
> (this is llvm 3.3)
>
> thanks,
> Jun
2013 Aug 24
1
[LLVMdev] redundant code in Mips arch?
On Sat, Aug 24, 2013 at 2:15 AM, Reed Kotler <rkotler at mips.com> wrote:
> Hi Jun,
>
> Are you using the Mips compiler or working on it?
>
>
yes, i am looking at its code to understand this architecture.
thanks.
Jun
>
> On 08/22/2013 11:12 PM, Jun Koi wrote:
>
>> hi,
>>
>> there are two arrays named DecoderTable32[] and DecoderTable16[] that
2013 Aug 23
0
[LLVMdev] redundant code in Mips arch?
Hi Jun,
Are you using the Mips compiler or working on it?
Reed
On 08/22/2013 11:12 PM, Jun Koi wrote:
> hi,
>
> there are two arrays named DecoderTable32[] and DecoderTable16[] that
> has no reference to. any idea why they are there? does it make sense to
> remove them?
>
> (this is llvm 3.3)
>
> thanks,
> Jun
>
>
>
>
>
>
2012 Oct 18
2
[LLVMdev] problem with my LLVM pass
On Tue, Oct 9, 2012 at 9:25 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
> On Fri, Oct 5, 2012 at 3:45 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
>> On Fri, Oct 5, 2012 at 3:39 PM, David Chisnall
>> <David.Chisnall at cl.cam.ac.uk> wrote:
>>> On 5 Oct 2012, at 08:34, Jun Koi wrote:
>>>
>>>> any idea on how to fix the problem?
2014 Apr 02
2
[LLVMdev] registerSize on X86 confused?
I looked at this briefly, I think it causes some mistakes that get reversed
later in fixupReg. The disassembler design is a bit of a mess with regards
to prefixes and operand size.
On Tue, Apr 1, 2014 at 4:43 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
>
>
>
> On Mon, Mar 31, 2014 at 11:48 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
>
>> Hi,
>>
>>
2012 Oct 02
2
[LLVMdev] [patch] set AssemblerDialect
currently, there is no (easy) way to set the AssemblerDialect. the
only method i am aware of is to set that via cl:opt.
this patch fixes that by adding a public function
setAssemblerDialect() to class MCAsmInfo.
Signed-off-by: Jun Koi <junkoi2004 at gmail.com>
diff --git a/include/llvm/MC/MCAsmInfo.h b/include/llvm/MC/MCAsmInfo.h
index 97aad71..cd08a7e 100644
---
2014 Jun 26
2
[LLVMdev] problem with X86's AVX assembler?
On Thu, Jun 26, 2014 at 10:23 AM, Adam Nemet <anemet at apple.com> wrote:
>
>
> On Jun 25, 2014, at 7:05 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
>
>
>
>
> On Thu, Jun 26, 2014 at 5:47 AM, Adam Nemet <anemet at apple.com> wrote:
>
>> Hi Jun,
>>
>> On Jun 25, 2014, at 8:14 AM, Jun Koi <junkoi2004 at gmail.com> wrote:
>>
2012 Oct 18
0
[LLVMdev] problem with my LLVM pass
Hi Jun,
On 18/10/12 11:19, Jun Koi wrote:
> On Tue, Oct 9, 2012 at 9:25 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
>> On Fri, Oct 5, 2012 at 3:45 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
>>> On Fri, Oct 5, 2012 at 3:39 PM, David Chisnall
>>> <David.Chisnall at cl.cam.ac.uk> wrote:
>>>> On 5 Oct 2012, at 08:34, Jun Koi wrote:
2012 Oct 03
1
[LLVMdev] [patch] set AssemblerDialect
On Wed, Oct 3, 2012 at 1:19 AM, Jim Grosbach <grosbach at apple.com> wrote:
> What's the use case?
the use case is that we can print out the assembly using alternative dialect.
currently, on Intel machine, the default dialect is AT&T, and we
cannot change that to Intel syntax without using cl:opt.
the new public method lets us change the dialect without having cl:opt involved.
2014 Nov 03
2
[LLVMdev] Mips's MicroMips ??
Hello Daniel,
At the moment we are preparing the patch for disassembling microMIPS 16 bit instructions and it will be on Phabricator tomorrow or on Wednesday.
Functionality is implemented in MipsDisassembler::getInstruction where first two bytes are read and decodeInstruction is called with DecoderTableMicroMips16 and only if it fails we read 4 bytes and call decodeInstruction with
2014 Sep 17
3
[LLVMdev] fail to compile latest llvm?
On Wed, Sep 17, 2014 at 10:14 PM, Simon Atanasyan <simon at atanasyan.com>
wrote:
> Hi,
>
> Probably you get the error because you try to build LLVM in the source
> code directory. Create a separate folder, cd to this folder and run
> the configure script.
>
> $ mkdir llvm-bld
> $ cd llvm-bld
> $ ../<llvm src>/configure --enable-targets=mips
> $ make
>
2012 Oct 05
2
[LLVMdev] problem with my LLVM pass
On Fri, Oct 5, 2012 at 3:39 PM, David Chisnall
<David.Chisnall at cl.cam.ac.uk> wrote:
> On 5 Oct 2012, at 08:34, Jun Koi wrote:
>
>> any idea on how to fix the problem?
>
> The correct solution is to fix the LLVM build to install the .cmake files in a location that CMake knows about.
could you please elaborate?
> The hacky solution that I've used is just to copy
2014 Jun 26
2
[LLVMdev] problem with X86's AVX assembler?
On Thu, Jun 26, 2014 at 5:47 AM, Adam Nemet <anemet at apple.com> wrote:
> Hi Jun,
>
> On Jun 25, 2014, at 8:14 AM, Jun Koi <junkoi2004 at gmail.com> wrote:
>
> > Hi,
> >
> > I am trying to assemble below instruction with latest LLVM code, but
> fail. Am I doing something wrong, or is this a bug?
> >
> >
> > $ echo "vaddps zmm7
2014 Mar 31
2
[LLVMdev] registerSize on X86 confused?
Hi,
In file X86DisassemblerDecoder.c, we have function readPrefixes() with
below code:
.....
} else if (insn->mode == MODE_32BIT) {
insn->registerSize = (hasOpSize ? 2 : 4);
insn->addressSize = (hasAdSize ? 2 : 4);
insn->displacementSize = (hasAdSize ? 2 : 4);
insn->immediateSize = (hasOpSize ? 2 : 4);
}
....
This is confused to me: so we
2014 Dec 24
2
[LLVMdev] X86 disassembler is quite broken on handling REX
On Wed, Dec 24, 2014 at 2:43 PM, Craig Topper <craig.topper at gmail.com>
wrote:
> I believe this particular error is caused by this. That seems easy enough
> to just drop the bit. Do you have other non-mmx examples?
>
> case TYPE_MM: \
> if (index > 7) \
> *valid = 0;
2014 Dec 26
2
[LLVMdev] X86 disassembler & assembler mismatch
The IMM3/IMM5 come from here
X86RecognizableInstr.cpp
943 TYPE("SSECC", TYPE_IMM3)
944: TYPE("AVXCC", TYPE_IMM5)
On Thu, Dec 25, 2014 at 8:22 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
>
>
> On Fri, Dec 26, 2014 at 11:54 AM, Jun Koi <junkoi2004 at gmail.com> wrote:
>
>> hi,
>>
>> some instructions
2012 Oct 02
0
[LLVMdev] [patch] set AssemblerDialect
What's the use case?
On Oct 1, 2012, at 8:33 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
> currently, there is no (easy) way to set the AssemblerDialect. the
> only method i am aware of is to set that via cl:opt.
>
> this patch fixes that by adding a public function
> setAssemblerDialect() to class MCAsmInfo.
>
> Signed-off-by: Jun Koi <junkoi2004 at
2012 Oct 09
0
[LLVMdev] problem with my LLVM pass
On Fri, Oct 5, 2012 at 3:45 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
> On Fri, Oct 5, 2012 at 3:39 PM, David Chisnall
> <David.Chisnall at cl.cam.ac.uk> wrote:
>> On 5 Oct 2012, at 08:34, Jun Koi wrote:
>>
>>> any idea on how to fix the problem?
>>
>> The correct solution is to fix the LLVM build to install the .cmake files in a location that
2015 Jul 31
2
[LLVMdev] Wrong encoding/decoding for POPC instruction of Sparc
I'll look into it, thanks for the report.
On Thu, Jul 30, 2015 at 11:01 PM, Jun Koi <junkoi2004 at gmail.com> wrote:
> Any ideas on this bug?
>
> Thanks.
>
>
> On Wed, Jul 29, 2015 at 12:17 AM, Jun Koi <junkoi2004 at gmail.com> wrote:
>
>> Hello,
>>
>> There is an issue in the latest Sparc code: while we can encode POPC,
>> decode
2012 Aug 11
2
[LLVMdev] which LLVM transforms can optimize this code?
hi,
i am trying to optimize the below code, in one of my LLVM functions:
....
store i32 96, i32* @XXX, align 4 ; (1)
store i32 117, i32* @yyy, align 4 ; (2)
store i32 31, i32* @XXX, align 4 ; (3)
....
naturally, optimize passes should remove the line (1), because later
line (3) overwrites the value of the same global variable XXX.
i run this code via "opt" with option