similar to: [LLVMdev] ctlz pattern

Are you looking for something other than calling __builtin_clz from c++ or calling @llvm.ctlz.* instrinsic from IR? I don't think we have anything that will auto converting a loop to ctlz or anything like that. We only seem to have a detection for popcount loops. On Thu, Aug 15, 2013 at 9:01 PM, reed kotler <rkotler at mips.com> wrote: > Does anyone know some simple c/c++ code or

This Pattern class says it's possible but seems just to not work or maybe I'm using it incorrectly. Probably I will go and fix it when I'm done with mips16. ________________________________________ From: Hal Finkel [hfinkel at anl.gov] Sent: Sunday, September 16, 2012 10:59 AM To: Anton Korobeynikov Cc: Kotler, Reed; LLVM-Dev ‎[llvmdev at cs.uiuc.edu]‎ Subject: Re: [LLVMdev] Pattern

Has anybody used the Pattern class. We all use Pat and ComplexPattern but I can't find any examples of Pattern. I have some instructions that I'm currently treating as pseudos but I'd like to treat them as patterns with several instructions but this does not seem to work, at least I can't get it to work so far. I get an error: Cannot handle instructions with temporaries yet!

Hi, SystemZ supports @llvm.ctlz.i64() natively with a single instruction (FLOGR), and lesser bitwidth versions of the intrinsic are promoted to i64. For some reason, this leads to unfolded additions of constants as shown below: This function: define i16 @fun(i16 %arg) {   %1 = tail call i16 @llvm.ctlz.i16(i16 %arg, i1 false)   ret i16 %1 } ,gives this optimized DAG as input to instruction

On 02/25/2014 02:38 PM, Eric Christopher wrote: > On Tue, Feb 25, 2014 at 2:32 PM, reed kotler <rkotler at mips.com> wrote: >> On 02/25/2014 09:30 AM, Richard Sandiford wrote: >>> reed kotler <rkotler at mips.com> writes: >>>> On 02/24/2014 04:42 PM, Eric Christopher wrote: >>>>> On Mon, Feb 24, 2014 at 4:40 PM, reed kotler <rkotler at

I see what my problem is here.... I'll continue to move further. Seems like Richards fix is still okay. On 02/25/2014 02:42 PM, Eric Christopher wrote: > On Tue, Feb 25, 2014 at 2:41 PM, reed kotler <rkotler at mips.com> wrote: >> On 02/25/2014 02:38 PM, Eric Christopher wrote: >>> On Tue, Feb 25, 2014 at 2:32 PM, reed kotler <rkotler at mips.com> wrote:

What have you tried? On Sun, Sep 16, 2012 at 3:34 PM, Kotler, Reed <rkotler at mips.com> wrote: > This Pattern class says it's possible but seems just to not work or maybe I'm using it incorrectly. > > Probably I will go and fix it when I'm done with mips16. > > > ________________________________________ > From: Hal Finkel [hfinkel at anl.gov] > Sent:

I'm interested in class Pattern. Classes Pat and ComplexPattern are used everywhere. ________________________________________ From: Triple Yang [triple.yang at gmail.com] Sent: Sunday, September 16, 2012 9:55 AM To: Kotler, Reed Cc: LLVM-Dev ‎[llvmdev at cs.uiuc.edu]‎ Subject: Re: [LLVMdev] Pattern class You might want to refer to lib/Target/Sparc/SparcInstrInfo.td for examples of both Pat

Here is a simple place I wanted to use it. ... On multiply, the result implicit is placed in a 64 bit hi/lo register. // // Format: MFLO rx MIPS16e // Purpose: Move From LO Register // To copy the special purpose LO register to a GPR. // def Mflo16: FRR16_M_ins<0b10010, "mflo", IIAlu> { let Uses = [LO]; let neverHasSideEffects = 1; } // // Pseudo Instruction for mult //

In the following example with gcc style builtins, in once case llvm.powi.f64 is emitted and in the other just a call to library function powf. ~/llvm/build/Debug+Asserts/bin/clang -S -emit-llvm pow1.c Why is that? Is there a way to force the call to an llvm style builtin? Tia. Reed -------------- next part -------------- A non-text attachment was scrubbed... Name: pow1.c Type: text/x-csrc

On 02/24/2014 04:42 PM, Eric Christopher wrote: > On Mon, Feb 24, 2014 at 4:40 PM, reed kotler <rkotler at mips.com> wrote: >> I need to leave soon and will take a look in the morning. >> >> I did look at the autoconf input files configure.ac >> >> There is a disable-zlib but not a disable-valgrind, even though it seems >> like there used to be.

It seems that patterns are matched in the order that they appear in the td file. Is this something we can rely on? def: ArithLogicI16_pat<add, immSExt8, AddiuRxRxImm16>; def: ArithLogicI16_pat<add, immSExt16, AddiuRxRxImmX16>; the immSExt8 will only match a 8 bit signed value. I want it to try the first pattern and then the second, if it fails. AddiuRxRxImm16 --- 16 bit

On 06/04/2012 05:17 PM, Daniel Berlin wrote: > Can we get back to the substantive discussion about your ideas for > lessening the technical debt? The lessening requires enlisting people that are willing to do this as opposed to doing fun science like cool optimization. I,for example, find the documentaiton, cleanup and refactoring to be interesting so I don't feel cheated to work on

On 06/10/2014 05:51 PM, Pete Cooper wrote: > Hi Reed > > You can do this on the instruction itself by telling it 2 operands > must be the same register. For example, from X86: > > let Constraints = "$src1 = $dst" in > defm INSERTPS : SS41I_insertf32<0x21, "insertps">; > > Thanks, Hi Pete, Sorry. I should have been more specific. I'm

On 02/25/2014 09:30 AM, Richard Sandiford wrote: > reed kotler <rkotler at mips.com> writes: >> On 02/24/2014 04:42 PM, Eric Christopher wrote: >>> On Mon, Feb 24, 2014 at 4:40 PM, reed kotler <rkotler at mips.com> wrote: >>>> I need to leave soon and will take a look in the morning. >>>> >>>> I did look at the autoconf input files

If you can't make an executable test from C or C++ code then how do you know something works. Just by examination of the .s? On 09/30/2014 03:18 PM, Reed Kotler wrote: > If I wanted to call this function that they generated by hand, from C or > C+ code, how would that be done? > > if have seen cases where a real boolean gets generated but it was > something fairly involved.

Well, differences of opinion is what makes horse races. Reed On 06/04/2012 04:57 PM, Daniel Berlin wrote: > On Mon, Jun 4, 2012 at 7:53 PM, reed kotler<rkotler at mips.com> wrote: >> On 06/04/2012 03:25 PM, Daniel Berlin wrote: >>> I'm pretty sure neither llvm nor clang have any technical debt at all. >>> >>> On Mon, Jun 4, 2012 at 5:18 PM, reed

I would like to make the following member of AsmPrinter be protected void EmitInlineAsm(StringRef Str, const MDNode *LocMDNode = 0, InlineAsm::AsmDialect AsmDialect = InlineAsm::AD_ATT) const; I have some stubs that I want to emit in MipsAsmParser . Are there any objections to doing this? Reed

FWIW, I'm putting together (hopefully to be done by the end of this weekend) a substantial refactoring of the TableGen backend API along with shiny new documentation (reStructuredText with sphinx) of all of TableGen, including documentation about how to write backends and---depending on how adventurous I get---a more detailed coverage of the syntax. Also, Reed, in your TableGen talk, IIRC,

Is there a simple way to just change the opcode of a machine instruction. I have a lot of long/short pairs where when I know the offset, i can replace the long version with the short version. Tia. REed