similar to: [LLVMdev] Inst field in MSP430InstrFormats.td

The Inst field is used to specify instruction encodings, which are then used to generate assemblers and disassemblers. I'm not sure offhand, but it's possible that the MSP430 backend doesn't make use of an auto-generated assembler. --Owen On Jul 21, 2013, at 4:19 PM, David Wiberg <dwiberg at gmail.com> wrote: > Hello, > > Within the file

On Fri, Jun 11, 2010 at 2:55 PM, Ben Ransford <ransford at cs.umass.edu> wrote: > Yesterday I noticed that MSP430 argument passing is broken in trunk; > see http://llvm.org/PR6573 for details and testcases.  The problem is > that calls aren't being preceded by instructions that put the > arguments into registers.  I backtracked my working copy and then > stepped forward

Hello, Yesterday I noticed that MSP430 argument passing is broken in trunk; see http://llvm.org/PR6573 for details and testcases. The problem is that calls aren't being preceded by instructions that put the arguments into registers. I backtracked my working copy and then stepped forward until it broke between r98937 and r98938. Refining further, I found that rolling back the

Hello, This patch against svn r82147 "fixes" PR4776. Certain targets (e.g., MSP430) allow a symbol to start with a number, e.g. "0x0021"; you can say stuff like "mov.b &0x0021, r15" to copy a byte from memory address 0x0021 to register r15. LLVM had been generating this ill-formed code instead: mov.b &_30_x0021, r15 # note ASCII '0' has

Hello all, Is it well known that building LLVM with --enable-optimized causes RegisterPass calls to be removed from dynamically loadable libraries (i.e., those built with LOADABLE_MODULE=1)? For example, here's what happens to the Hello pass (ToT on Darwin, both with and without --enable-optimized): $ pwd /Users/ransford/llvm/lib/Transforms/Hello $ nm -j Release+Asserts/Hello.o | c++filt -p

Hello, Several people have expressed interest in using LLVM to target MSP430 microcontrollers. Anton wrote an MSP430 backend as an exercise, and some of the nastiest parts are done (thanks Anton!), but the consensus seems to be that there's still quite a bit of work left to do before LLVM can replace the commercial and open-source compilers (IAR, CCE, CrossWorks, mspgcc, and so on) that

Hello, I just built a virgin ToT (r98634) for release on vanilla Snow Leopard. It seems that the Hello pass doesn't want to load because of undefined symbols: builddir% ../llvm/configure --prefix=$(PWD)/../installdir --enable-optimized builddir% make builddir% make install && cd ../installdir installdir% bin/opt -load lib/libLLVMHello.dylib Error opening

Hi Gents, For those of us with out-of-tree backends which are not 32bit, the msp430 backend is a useful vehicle for examining changes and testing out ideas. So I was wondering about enabling debug output on the MSP430 backend so that I can illustrate a few issues to Adrian and you on the variable pieces side. (there doesn't appear to be any specific person claiming the msp430 code right

There are LLVM 2.9 RC1 pre-release tarballs source available. You can find them here: http://llvm.org/pre-releases/2.9/ Please download them, build them, and compile things to your heart's content. And most importantly file a bunch of bug reports. :-) Share and enjoy! -bw

Hello, While trying to find out why the LDC compiler refuses to generate object code for MSP430 targets (but generates MSP430 assembly or LLVM IR/bitcode), I came across the following apparent inconsistency. This works: $ clang --target=msp430 -c test.c This doesn't work: $ clang --target=msp430 -S -emit-llvm test.c $ llc -filetype=obj test.ll /opt/msp430/bin/llc: target does not support

Hello, I have a user asking about msp430 support for Zig. When they try to target msp430, this error is triggered: if (target_machine->addPassesToEmitFile(MPM, dest, ft)) { *error_message = strdup("TargetMachine can't emit a file of this type"); return true; } I tried using clang alone: clang -c add.c -target msp430-unknown int add(int

On Thu, Jul 6, 2017 at 2:19 AM, Tim Northover <t.p.northover at gmail.com> wrote: > On 5 July 2017 at 17:51, Luís Marques via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > Cool. When I did that on macOS, LDC generated a lot of complaints, > possibly > > because it is assuming mach-o files. I tried changing from > -mtriple=msp430 > > to

On Thu, Jul 6, 2017 at 1:35 AM, Nicholas Wilson < iamthewilsonator at hotmail.com> wrote: > Luís, try using the -no-integrated-as flag to execute the assembler for > you. > We should probably make that the default for MSP430. > Cool. When I did that on macOS, LDC generated a lot of complaints, possibly because it is assuming mach-o files. I tried changing from -mtriple=msp430

Hi David, Thank you for your patience but I still don’t get it: I don’t see how that is a “command”, as it’s just a list of strings that state command options. I know how to use the debugger, this is what I attempt to debug: clang --target=msp430 -emit-llvm -c -S -Oz main.c The debugger works fine, but only on the main thread. However breakpoints do not work with the code that was invoked

Hi everyone, inline asm code is like below: void test(unsigned short a) { asm("myinstr my16bitreg, %0"::"r"(a)); } I want it generate instruction "myinstr my16bitreg, r15" I execute llc test.bc -march = msp430 -o test.s then it reports "LLVM ERROR: Couldn't allocate input reg for constraint 'r' !" What's the reason?

Hi David, Thank you for your help. Please, can you elaborate on this?. The command line that I get with -### starts with this: clang version 9.0.1 (https://github.com/llvm/llvm-project.git 6e38ee067b8fa08792f551fb565bbb8ada4864b1) Target: msp430 Thread model: posix InstalledDir: /Users/joan/LLVM-9/llvm-project/build/Debug/bin "/Users/joan/LLVM-9/llvm-project/build/Debug/bin/clang"

What guarantees, if any, does the scheduler make when two selection nodes are linked by a Flag type? Can I expect the machine instructions that are selected from the two nodes to be scheduled consecutively? I'm trying to implement code generation for SELECT_CC nodes in a back end that I'm working on. The compare operations on the architecture communicate via bits in a global status

Hello > inline asm code is like below: > > void test(unsigned short a) { >    asm("myinstr          my16bitreg, %0"::"r"(a)); > } > I want it generate instruction "myinstr          my16bitreg, r15" > > I execute > llc test.bc -march = msp430 -o test.s > then it reports > "LLVM ERROR: Couldn't allocate input reg for constraint

On Wed, Dec 30, 2015 at 2:48 AM, Anton Korobeynikov <anton at korobeynikov.info > wrote: > Just a side note - the assembly posted is clearly ARM, not MSP430 :) Isn't MSP430 an ARM based chip? -- Rail Shafigulin Software Engineer Esencia Technologies -------------- next part -------------- An HTML attachment was scrubbed... URL:

> At -O0, you don't. __mulsi3 is the obvious lowering, and you're doing > something wrong if your tools don't provide it. MSP430 is 16 bit target, so mulsi is a bit expensive there, mulhi / mulqi can be implemented via hardware multiplier. There are several problems wrt 16 bit support inside LLVM in general and msp430 in particular: 1. In some places LLVM expectes 32 bit or 64