similar to: [LLVMdev] Request to review patch for bug #14792

On Thu, Jul 18, 2013 at 10:31 PM, Yun-Wei Lee <lee2041412 at gmail.com> wrote: > Thank for your suggestion. > > I have tried to use GetAlignedArgumentStackSize. > It is so strange that this function may output uncorrectly. > For example, the StackSize will be 40 when handling the third function call > in main. > If I modified the this function, it will fail one test.

Hi, I am trying to plot two distribution graph on one plot. But I dont know how. I set them to the same x, y limit, even same x, y labels. Code: x1=rnorm(25, mean=0, sd=1) y1=dnorm(x1, mean=0, sd=1) x2=rnorm(25, mean=0, sd=1) y2=dnorm(x2, mean=0, sd=1) plot(x1, y1, type='p', xlim=range(x1,x2), ylim=range(y1, y2), xlab='x', ylab='y') plot(x2, y2, type='p',

Hi everyone, I'm implementing varags handling for PPC32 with the ELF ABI. It is largely more complicated than the Macho ABI or x86 because it manipulates a struct instead of a direct pointer in the stack. You can find the layout of the va_list struct at the end of this mail. A VAARG call requires a lot of computation. Typically the C code for va_arg(ap, int) is: int va_arg_gpr(ap_list

When I use clang on an x86-64 to spit out the LLVM, like this clang -O -S -emit-llvm varargstest.c where varargstest.c looks like this int add_em_up(int count, ...) { va_list ap; int i, sum; va_start(ap, count); sum = 0; for (i = 0; i < count; i++) sum += va_arg(ap, int); va_end(ap); return sum; } I see LLVM that looks like it's been customized for the x86-64, versus

Hi, I try to use lm to fit a linear model with 600k rows and 70 attributes. But I can't even load the data into the R environment. The error message says the vector memory is used up. Is there anyone having experience with large datasets in R? (I bet) Please advise. thanks, Yun-Fang [[alternative HTML version deleted]]

Checked out the latest unstable version of Xen 4.4 but failed to create a PVHVM domU Configured Xen with ./configure --prefix=/usr DomU config file: name = "pvhvm" builder=''hvm'' device_model = ''qemu-xen'' memory = ''512'' vcpus = ''4'' pae=1 acpi=1 apic=1 vif = [ ''mac=00:16:3E:51:20:8C, bridge=xenbr0,

All Is there an R command to produce error bars around a plotted point. Crawley's book uses the command error.bar() but my version of R rejects it. Must be an S+ command(?). Thanks REX [[alternative HTML version deleted]]

Hello, I have install Horde rpm with webmin: Instalando paquete(s) con el comando yum -y install yun grouinstall horde ... Loaded plugins: fastestmirror Loading mirror speeds from cached hostfile * base: centos.intergenia.de * epel: ftp-stud.hs-esslingen.de * extras: centos.intergenia.de * updates: ftp.belnet.be Setting up Install Process No package yun available. No package grouinstall

Hello, FreeBSD 7.0-RELEASE-p3 #3 $top ... PID USERNAME THR PRI NICE SIZE RES STATE C TIME WCPU COMMAND 36032 root 2838 44 0 1917M 1493M ucond 0 406:39 3.03% CGServer ... $cat /boot/loader.conf.local ... kern.maxdsiz="1073741824" kern.maxssiz="134217728" kern.dfldsiz="1073741824" $limits Resource limits (current): ... datasize

Thanks Anton and Krzysztof! Here is the dump using the -debug flag. At this point I am not making much sense of this, would it be too much to ask if one of you could walk me through one of these lines? One thing that I didn't point out is that I never defined any separate floating point registers, not sure if this will pose any issue? Thanks again for your time! Jeff jeff at

posting the question in r-help@ to get more feedback :-) thanks, Yun-Fang ----- Original Message ----- From: "Yun-Fang Juan" <yunfang at yahoo-inc.com> To: <s-news at wubios.wustl.edu> Sent: Tuesday, December 16, 2003 2:04 PM Subject: [S] plot stacked bar chart in R > Hi, > I am trying to plot a stacked bar chart in R but am not able to find the > documentation.

Hi, I am having issues running a new backend that I created for a new architecture. I suspect these errors may have something to do with how I have the string setup in LLVMTargetMachine() below? Also - It would be great if someone could point me to a document that describes some of these error messages? For example what does t26 ..t4 mean? Thanks in advance for taking your valuable time to help

Full_Name: Dong-Yun Kim Version: 1.7.0/1.8.1 OS: WinMe/WinXP Submission from: (NULL) (4.33.147.192) Hi all, It appears that R has a problem with evaluating logical "==" operator. The following are a few examples I found: > 2.1+0.2==2.3 [1] FALSE > 2.7+0.1==2.8 [1] FALSE > 2.7+0.2==2.9 [1] FALSE > 3.1+0.2==3.3 [1] FALSE Thanks. Dong-Yun Kim

Suppose I have a target that does not have register+constant addressing mode. Then, I have DAG like: (store ..., (frameindex)) Targets like SPARC have the following patterns to catch this: def ADDRri : ComplexPattern<i32, 2, "SelectADDRri", [frameindex], []>; def STri : F3_2<3, 0b000100, (outs), (ins MEMri:$addr, IntRegs:$src),

Guys, OK, now that we have the new core contributors squared away, we can go back to finishing the contributors list. There were some people who got added and then there is existing contributors list. I think Darren''s suggestion to wait to add new core contributors is fine (let the new constitution settle down and we can in the meanwhile have a more inclusive look at both rather than

On Dec 3, 2007, at 12:53 PM, Vladimir Prus wrote: > > Suppose I have a target that does not have register+constant > addressing mode. Then, I have DAG like: > > (store ..., (frameindex)) > > Targets like SPARC have the following patterns to catch this: > > def ADDRri : ComplexPattern<i32, 2, > "SelectADDRri", [frameindex], []>; > def STri :

Hi All I'm having nightmares with FrameIndexes during my backend development :( I have ComplexPatterns defined for my two addressing modes (RR and RI). Most of the time, FrameIndex operands appear to be on load/store nodes, in which case everything works fine as my custom addressing modes matchers work fine. Unfortunately, I now have an add node which has a FrameIndex operand (this results

>> While investigating one of the existing tests >> (test/CodeGen/X86/tailcallpic2.ll), I ran into IR that produces some >> interesting code. The IR is very straightforward: >> >> define protected fastcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 >> %a4) { >> entry: >> ret i32 %a3 >> } >> >> define fastcc i32 @tailcaller(i32

Evan Cheng wrote: > > On Dec 3, 2007, at 12:53 PM, Vladimir Prus wrote: > >> >> Suppose I have a target that does not have register+constant >> addressing mode. Then, I have DAG like: >> >> (store ..., (frameindex)) >> >> Targets like SPARC have the following patterns to catch this: >> >> def ADDRri : ComplexPattern<i32, 2,

Hi all, I've been working on a backend of our architecture and noticed llvm performs following combining although one of operands is FrameIndex. Combining: t114: i64 = add FrameIndex:i64<0>, Constant:i64<56> Creating new node: t121: i64 = or FrameIndex:i64<0>, Constant:i64<56> ... into: t121: i64 = or FrameIndex:i64<0>, Constant:i64<56> This