similar to: [LLVMdev] [LLVM Dev] [Discussion] Function-based parallel LLVM backend code generation

On Tue, Jul 16, 2013 at 3:33 AM, Wan, Xiaofei <xiaofei.wan at intel.com> wrote: > Hi, community: > > For the sake of our business need, I want to enable "Function-based parallel code generation" to boost up the compilation of single module, please see the details of the design and provide your feedbacks on below aspects, thanks! > 1. Is this idea the proper solution for

Please see Shuxin's proposal on "parallelizing post-IPO stage". It seems the two projects are related. Evan On Jul 16, 2013, at 3:33 AM, "Wan, Xiaofei" <xiaofei.wan at intel.com> wrote: > Hi, community: > > For the sake of our business need, I want to enable "Function-based parallel code generation" to boost up the compilation of single module,

Yes, the purpose is similar, we started this job from last year; But it Shuxin's solution is module based (correct me if I am wrong), we tried this solution and failed for many reasons, it is described in my design document https://docs.google.com/document/d/1QSkP6AumMCAVpgzwympD5pI3btPJt4SRgjY-vhyfySg/edit?usp=sharing we need discuss two solution and compare them, then adopt one solution

While I think the end goal you're describing is close to the correct one, I see the high-level strategy for getting there somewhat differently: 1) The code generators are only one collection of function passes that might be parallelized. Many others might also be parallelized profitably. The design for parallelism within LLVM's pass management infrastructure should be sufficiently generic

Hi, community: For the sake of our business need, I want to enable "Function-based parallel code generation" to boost up the compilation of single module, please see the details of the design and provide your feedbacks on below aspects, thanks! 1. Is this idea the proper solution for my requirement 2. This new feature will be enabled by llc -thd=N and has no impact on original llc when

-----Original Message----- From: Shuxin Yang [mailto:shuxin.llvm at gmail.com] Sent: Wednesday, July 17, 2013 1:50 AM To: Wan, Xiaofei Cc: Evan Cheng; Shuxin Yang; LLVM Developers Mailing List (llvmdev at cs.uiuc.edu) Subject: Re: [LLVMdev] [LLVM Dev] [Discussion] Function-based parallel LLVM backend code generation On 7/16/13 7:23 AM, Wan, Xiaofei wrote: > Yes, the purpose is similar, we

On Tue, Jul 16, 2013 at 1:18 PM, Xinliang David Li <xinliangli at gmail.com>wrote: > Ignoring FE time which can be fully parallelized and assuming 10% > compile time is spent in serial module passes, 25% time is spent in > CGSCC pass, the maximum speed up that can be gained by using function > level parallelism is less than 3x. Even adding support for parallel > compilation

On 7/16/13 7:23 AM, Wan, Xiaofei wrote: > Yes, the purpose is similar, we started this job from last year; > But it Shuxin's solution is module based (correct me if I am wrong), we tried this solution and failed for many reasons, it is described in my design document > https://docs.google.com/document/d/1QSkP6AumMCAVpgzwympD5pI3btPJt4SRgjY-vhyfySg/edit?usp=sharing > > we need

On Tue, Jul 16, 2013 at 1:37 PM, Xinliang David Li <xinliangli at gmail.com>wrote: > On Tue, Jul 16, 2013 at 1:33 PM, Chandler Carruth <chandlerc at google.com> > wrote: > > On Tue, Jul 16, 2013 at 1:18 PM, Xinliang David Li <xinliangli at gmail.com > > > > wrote: > >> > >> Ignoring FE time which can be fully parallelized and assuming 10%

On 7/16/2013 9:51 PM, Wan, Xiaofei wrote: > [Xiaofei] why? I don't understand it very well here, you mean it can > generate totally identical binaries as the original llc, including the > function order (function order may not affect code quality, but we > should make sure the output is same in each run)? Per <http://www-plan.cs.colorado.edu/diwan/asplos09.pdf>, function

Oh, got it. Thanks for your explain. I misunderstand what getLocation does. If I would like to get the result of alias analysis referring to the stored value, what should I do in llvm? On 2/16/15 1:42 PM, Hal Finkel wrote: > ----- Original Message ----- >> From: "Haopeng Liu" <hyliuhp at gmail.com> >> To: "Hal Finkel" <hfinkel at anl.gov> >>

I want to go a lot deeper with my tracing of MySQL and to do so I want to look into MySQL Thread Descriptors (class THD). Inside is a great bulk of information utilized by a great many of the core functions within MySQL... I really want to get in there. So far I''ve had no luck though. It''s a C++ class, and I''m afraid that I''m approaching it like a C struct,

t and t2 are two pointers defined in .c file. The definitions in .bc are: %thd = alloc i64, align 8 %t = alloca i64*, align 8 %t2 = alloca i64*, align 8 .c file likes this: int thd; int *t = &thd; int *t2 = t; On 2/16/15 12:28 PM, Hal Finkel wrote: > ----- Original Message ----- >> From: "Haopeng Liu" <hyliuhp at gmail.com> >> To: llvmdev at cs.uiuc.edu

On Tue, Jul 16, 2013 at 1:33 PM, Chandler Carruth <chandlerc at google.com> wrote: > On Tue, Jul 16, 2013 at 1:18 PM, Xinliang David Li <xinliangli at gmail.com> > wrote: >> >> Ignoring FE time which can be fully parallelized and assuming 10% >> compile time is spent in serial module passes, 25% time is spent in >> CGSCC pass, the maximum speed up that can

http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=395 The guest domain crashed during the routine daily tests that I ran. Machine: IBM ThinkCentre, 1GB of RAM with FC3 based setup. Xen build, PAE enabled using changeset: 7701:abbe3df33774 [root@thinkcentre-dom0 xen-unstable.hg]# cat /proc/cpuinfo processor : 0 vendor_id : GenuineIntel cpu family : 15 model : 3

LLVM IR represents higher level than assembler code, it keeps some names and it is easier to revert the IR to source code than a binary format. The main task of LLVM IR is code generation. I don't think adding obfuscation has particular worth, those who need it can use tools and approaches specifically aimed at obfuscation. Even simple rename of identifiers in source code makes C/C++ file

Yes, in my example, %1 and %2 point to t. %3 points to t2. But t and t2 point to the same var, is it? That's where I'm confused. On 2/16/15 12:37 PM, Hal Finkel wrote: > ----- Original Message ----- >> From: "Haopeng Liu" <hyliuhp at gmail.com> >> To: "Hal Finkel" <hfinkel at anl.gov> >> Cc: llvmdev at cs.uiuc.edu >> Sent:

On Tue, Jul 16, 2013 at 1:40 PM, Chandler Carruth <chandlerc at google.com> wrote: > On Tue, Jul 16, 2013 at 1:37 PM, Xinliang David Li <xinliangli at gmail.com> > wrote: >> >> On Tue, Jul 16, 2013 at 1:33 PM, Chandler Carruth <chandlerc at google.com> >> wrote: >> > On Tue, Jul 16, 2013 at 1:18 PM, Xinliang David Li >> > <xinliangli

Hi Has anybody done THD or THD-N measurements with the CELT Codec (bext would be on various bit rates) If someone could share results for Mono at 64kBit and Stereo at 128 and 196kBit it would be great. thank you very much Jochen -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.xiph.org/pipermail/opus/attachments/20100817/b1da17cc/attachment-0002.htm

Hi all, I am implementing a pass which needs aliasanalysis in llvm. My pass firstly records all store or load instructions as follows: loc[cnt++] = AA.getLocation(si/li); Then, get each pairwise alias result. AliasAnalysis::AliasResult ar = AA.alias(loc[i], loc[j]); switch(ar){ case 0,1,2,3;} And the command is: opt -load mypass.so -mypass -basicaa test.bc The store/load in test.bc: (1):