Displaying 20 results from an estimated 10000 matches similar to: "[LLVMdev] How to configure the optimization parts in codegen"
2016 Feb 22
2
raw_pwrite_stream to string or stdout?
TargetMachine::CGFT_AssemblyFile is exactly what I am trying to write out.
Frank
On 02/22/2016 11:06 AM, Rafael Espíndola wrote:
> On 19 February 2016 at 16:16, Frank Winter via llvm-dev
> <llvm-dev at lists.llvm.org> wrote:
>> TargetMachine::addPassesToEmitFile(..)
>> requires as its 2nd argument an raw_pwrite_stream.
>>
>> Is it possible to create such a
2013 May 22
1
[LLVMdev] How to write output of a backend to a memory buffer instead of a into a file?
Right now, I am using
TargetMachine::addPassesToEmitFile
<http://llvm.org/docs/doxygen/html/classllvm_1_1LLVMTargetMachine.html#a356929c1f0d202e4a9d3202aff1dbb05>
to write the output of a backend to a file. How can I tell LLVM to write
into a memory buffer instead?
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2015 Jul 27
1
[LLVMdev] addPassesToEmitFile and Intel syntax
Hi,
I am using TargetMachine::addPassesToEmitFile to write out x86-64
assembly. However, the generated assembly uses the AT&T syntax. Is there
a way to switch to the Intel syntax?
Thanks,
Frank
2016 Feb 22
2
raw_pwrite_stream to string or stdout?
Note that raw_fd_ostream is not seekable, and hence will not be suitable as
addPassesToEmitFile output stream.
2016-02-22 18:27 GMT+02:00 Rafael Espíndola <llvm-dev at lists.llvm.org>:
> On 22 February 2016 at 11:16, Frank Winter <fwinter at jlab.org> wrote:
> > TargetMachine::CGFT_AssemblyFile is exactly what I am trying to write
> out.
>
> I see.
>
> For
2013 Jan 07
0
[LLVMdev] How to output a .S *and* a .OBJ file?
Hi,
I'm embarrassed that I can't figure this out... I have a compiler that
outputs my module in either .s assembly format or .obj binary format,
either one works just fine. But if I try to output both of them by adding
passes, LLVM throws an Assert:
void WinCOFFStreamer::EmitLabel(MCSymbol *Symbol) {
assert(Symbol->isUndefined() && "Cannot define a symbol
2013 Nov 15
3
[LLVMdev] Limit loop vectorizer to SSE
On 15 November 2013 20:05, Frank Winter <fwinter at jlab.org> wrote:
> Good catch! That was the problem in my case too. I totally
> overlooked the alignment requirement for AVX.
I wonder if the validation mechanism shouldn't have caught it earlier... Do
you guys run validate on the modules before JIT-ing?
--renato
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2015 Jul 01
3
[LLVMdev] SLP vectorizer on AVX feature
On 1 July 2015 at 21:22, Frank Winter <fwinter at jlab.org> wrote:
> there were two follow-up emails.
I only got one... weird...
> The issue is solved. The SLP vectorizer has
> a magic number built into the code which determines the max. vector length
> to search for. That was set to 128 bits. Increasing it to 256 bits solved
> the issue.
That looks like a simple fix. Is
2013 Oct 27
0
[LLVMdev] Why is the loop vectorizer not working on my function?
Hi Arnold,
thanks for the detailed setup. Still, I haven't figured out the right
thing to do.
I would need only the native target since all generated code will
execute on the JIT execution machine (right now, the old JIT interface).
There is no need for other targets.
Maybe it would be good to ask specific questions:
How do I get the triple for the native target?
How do I setup the
2013 Nov 15
0
[LLVMdev] Limit loop vectorizer to SSE
Hmm.. I don't quite understand. How can a module validator
catch this, when it's the pointers, i.e. the payload, you pass
as function arguments that need to be aligned.. ?!
Frank
On 15/11/13 15:16, Renato Golin wrote:
> On 15 November 2013 20:05, Frank Winter <fwinter at jlab.org
> <mailto:fwinter at jlab.org>> wrote:
>
> Good catch! That was the problem in my
2013 Nov 06
3
[LLVMdev] loop vectorizer
Good that you bring this up. I still have no solution to this
vectorization problem.
However, I can rewrite the code and insert a second loop which
eliminates the 'urem' and 'div' instructions in the index calculations.
In this case, the inner loop's trip count would be equal to the SIMD
length and the loop vectorizer ignores the loop. Unrolling the loop and
SLP is not an
2013 Oct 31
5
[LLVMdev] loop vectorizer
On 30 October 2013 18:40, Frank Winter <fwinter at jlab.org> wrote:
> const std::uint64_t ir0 = (i+0)%4; // not working
>
I thought this would be the case when I saw the original expression. Maybe
we need to teach module arithmetic to SCEV?
--renato
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2013 Nov 06
1
[LLVMdev] loop vectorizer
On 06/11/13 08:54, Arnold wrote:
>
>
> Sent from my iPhone
>
> On Nov 5, 2013, at 7:39 PM, Frank Winter <fwinter at jlab.org
> <mailto:fwinter at jlab.org>> wrote:
>
>> Good that you bring this up. I still have no solution to this
>> vectorization problem.
>>
>> However, I can rewrite the code and insert a second loop which
>>
2013 Oct 27
3
[LLVMdev] Why is the loop vectorizer not working on my function?
Hi Frank,
On Oct 26, 2013, at 6:29 PM, Frank Winter <fwinter at jlab.org> wrote:
> I would need this to work when calling the vectorizer through
> the function pass manager. Unfortunately I am having the same
> problem there:
I am not sure which function pass manager you are referring here. I assume you create your own (you are not using opt but configure your own pass
2013 Oct 31
3
[LLVMdev] loop vectorizer misses opportunity, exploit
Hi Frank,
This loop should be vectorized by the SLP-vectorizer. It has several scalars (C[0], C[1] … ) that can be merged into a vector. The SLP vectorizer can’t figure out that the stores are consecutive because SCEV can’t analyze the OR in the index calculation:
%2 = and i64 %i.04, 3
%3 = lshr i64 %i.04, 2
%4 = shl i64 %3, 3
%5 = or i64 %4, %2
%11 = getelementptr inbounds float*
2013 Nov 06
0
[LLVMdev] loop vectorizer
Sent from my iPhone
> On Nov 5, 2013, at 7:39 PM, Frank Winter <fwinter at jlab.org> wrote:
>
> Good that you bring this up. I still have no solution to this vectorization problem.
>
> However, I can rewrite the code and insert a second loop which eliminates the 'urem' and 'div' instructions in the index calculations. In this case, the inner loop's trip
2013 Nov 12
2
[LLVMdev] Limit loop vectorizer to SSE
On 12 November 2013 15:14, Frank Winter <fwinter at jlab.org> wrote:
> I am asking because the option 'force-vector-width' is too restrictive.
> I would like to leave open the possibility to use vector width 2.
I was about to say that, and you saved us both one cycle. ;)
What you could do is to force an architecture that doesn't have AVX, only
SSE. I'm not sure how
2013 Nov 12
2
[LLVMdev] Limit loop vectorizer to SSE
On 12 November 2013 15:53, Frank Winter <fwinter at jlab.org> wrote:
> .. forcing the vector size to 4 does not prevent using AVX.
>
Sure. That's more for tests than anything else.
So, there are ways of disabling stuf in Clang, for instance "-mattr=-avx"
or "-target-feature -avx", but I'm not sure how you're doing it in the JIT.
I'm also not sure
2013 Oct 31
0
[LLVMdev] loop vectorizer misses opportunity, exploit
Hi Nadav,
that's the whole point of it. I can't in general make the index
calculation simpler. The example given is the simplest non-trivial index
function that is needed. It might well be that it's that simple that the
index calculation in this case can be thrown aways altogether and - as
you say - be replaced by the simple loop you mentioned. However, this
cannot be done in the
2015 Jul 01
3
[LLVMdev] SLP vectorizer on AVX feature
Frank,
It sounds like the SLP vectorizer thinks that it is more profitable to use 128bit wide operations (because 256bit operations are double pumped on Sandybridge). Did you see a different result on Haswell?
Thanks,
Nadav
> On Jul 1, 2015, at 11:06 AM, Frank Winter <fwinter at jlab.org> wrote:
>
> I realized that the function parameters had no alignment attributes on them.
2014 Aug 07
2
[LLVMdev] MCJIT generates MOVAPS on unaligned address
> On Aug 7, 2014, at 2:57 PM, Arnold Schwaighofer <aschwaighofer at apple.com> wrote:
>
> Your .ll file does not have a data layout. Opt will not initialize the DataLayoutPass. The SLP vectorizer will not vectorize because there is no DataLayoutPass.
>
> debug-cmake/bin/opt -default-data-layout="e-m:e-i64:64-f80:128-n8:16:32:64-S128" -basicaa -slp-vectorizer -S