similar to: [LLVMdev] optimize for size

Displaying 20 results from an estimated 30000 matches similar to: "[LLVMdev] optimize for size"

2013 May 28
2
[LLVMdev] optimize for size
On 05/27/2013 10:48 PM, Evan Cheng wrote: > I don't quite understand your question. Clang already supports -Os option. > > Evan Okay. Do I need to add anything to the llc command line? > Sent from my iPad > > On May 27, 2013, at 7:47 PM, reed kotler <rkotler at mips.com> wrote: > >> I'm trying to set the default optimizations for mips16. >>
2013 May 28
0
[LLVMdev] optimize for size
Sent from my iPad On May 27, 2013, at 10:49 PM, reed kotler <rkotler at mips.com> wrote: > On 05/27/2013 10:48 PM, Evan Cheng wrote: >> I don't quite understand your question. Clang already supports -Os option. >> >> Evan > Okay. > > Do I need to add anything to the llc command line? No. It's captured as a function attribute. Evan > >>
2013 May 28
0
[LLVMdev] optimize for size
I don't quite understand your question. Clang already supports -Os option. Evan Sent from my iPad On May 27, 2013, at 7:47 PM, reed kotler <rkotler at mips.com> wrote: > I'm trying to set the default optimizations for mips16. > > Mips16 is a processor mode for code size compression. > > So for clang I want to add -Os, I think. > > In general I don't
2013 May 28
1
[LLVMdev] optimize for size
Does -O0 disable inlining? On 05/27/2013 10:52 PM, Evan Cheng wrote: > > Sent from my iPad > > On May 27, 2013, at 10:49 PM, reed kotler <rkotler at mips.com> wrote: > >> On 05/27/2013 10:48 PM, Evan Cheng wrote: >>> I don't quite understand your question. Clang already supports -Os option. >>> >>> Evan >> Okay. >> >> Do
2012 May 14
3
[LLVMdev] getMinimalPhysRegClass
On 05/14/2012 02:42 PM, Jakob Stoklund Olesen wrote: > On May 14, 2012, at 2:28 PM, reed kotler wrote: > >> I'm not using getMinimalPhysRegClass. Some target independent code is using it. > Probably PEI. > >> It makes trouble for us and I would like to submit a patch to make it a virtual function so that I can override it and make it meaningful for Mips, as long as this
2013 Jan 11
2
[LLVMdev] adding IR attributes to llvm
Yes, you could have mips16 and fastcc. Mips16 just means that processor mode to execute that function is "mips16". So in a mips16 designated function, I will just emit mips16 instructions and in a "nomips16" function, just emit normal mips32 instructions. I tend to call this "mips32" normal mode, "standard encoding" because in reality the processor is
2012 May 14
0
[LLVMdev] getMinimalPhysRegClass
Reed, On May 14, 2012, at 3:45 PM, reed kotler <rkotler at mips.com> wrote: > On 05/14/2012 02:42 PM, Jakob Stoklund Olesen wrote: >> On May 14, 2012, at 2:28 PM, reed kotler wrote: >> >>> I'm not using getMinimalPhysRegClass. Some target independent code is using it. >> Probably PEI. >> >>> It makes trouble for us and I would like to
2013 Jan 09
2
[LLVMdev] mips16 hard float puzzle
On 01/08/2013 01:48 PM, Eli Friedman wrote: > On Mon, Jan 7, 2013 at 6:07 PM, reed kotler <rkotler at mips.com> wrote: >> For example: >> >> /home/rkotler/llvm/install/bin/llc -mcpu=mips16 hf16_2.ll -march=mipsel >> -relocation-model=pic -o hf16_2.s -O3 -mips16-hard-float -soft-float > Try something like the following: > > float f; > double test(void*
2013 Nov 23
2
[LLVMdev] bugpoint question
In that case it tries to do something but fails. rkotler at ubuntu-rkotler:~/testmips16$ /home/rkotler/llvmw/install/bin/bugpoint casts.bc -llc-safe --safe-tool-args -target=mips-linux-gnu -mcpu=mips16 -mips16-constant-islands Read input file : 'casts.bc' *** All input ok Initializing execution environment: Found llc: /home/rkotler/llvmw/install/bin/llc Running the code
2013 Mar 22
4
[LLVMdev] proposed change to class BasicTTI
Just realized that BasicTransformInfoClass is an immutable pass. Not sure how to reconcile this with fact that there will be different answers needed depending on the subtarget. Seems like BasicTansformInfoClass should become a function pass that does not modify anything. On 03/22/2013 09:43 AM, Reed Kotler wrote: > Another way to do this would to be to have a reset virtual function >
2013 Jan 05
4
[LLVMdev] mips16 hard float puzzle
On 01/04/2013 06:08 PM, Eli Friedman wrote: > On Fri, Jan 4, 2013 at 4:08 PM, reed kotler <rkotler at mips.com> wrote: >> I'm working on mips16 hard float which at a first approximation is just soft >> float but calls different library routines. Those different library routines >> are just an implementation (in mips32 mode) of soft float using mips32 >>
2013 Jan 08
2
[LLVMdev] mips16 hard float puzzle
On 01/04/2013 07:45 PM, Eli Friedman wrote: > On Fri, Jan 4, 2013 at 6:28 PM, reed kotler <rkotler at mips.com> wrote: >> On 01/04/2013 06:08 PM, Eli Friedman wrote: >>> On Fri, Jan 4, 2013 at 4:08 PM, reed kotler <rkotler at mips.com> wrote: >>>> I'm working on mips16 hard float which at a first approximation is just >>>> soft
2013 Mar 22
0
[LLVMdev] proposed change to class BasicTTI
Hi Reed, We will need to reconstruct the target machine and the TTI chain when the function attributes change. We currently don't have code for doing that but I suggest that you talk with Bill Wendling about the best way to implement this. Thanks, Nadav On Mar 22, 2013, at 11:30 AM, Reed Kotler <rkotler at mips.com> wrote: > Just realized that BasicTransformInfoClass is an
2013 Jan 05
0
[LLVMdev] mips16 hard float puzzle
On Fri, Jan 4, 2013 at 6:28 PM, reed kotler <rkotler at mips.com> wrote: > On 01/04/2013 06:08 PM, Eli Friedman wrote: >> >> On Fri, Jan 4, 2013 at 4:08 PM, reed kotler <rkotler at mips.com> wrote: >>> >>> I'm working on mips16 hard float which at a first approximation is just >>> soft >>> float but calls different library
2012 Sep 26
5
[LLVMdev] mips16 puzzle
We already divided out our classes as you did for ARM. The problem here is that we have a store/load byte/halfword to/from a Frame object. We know at that time that it's not going to be possible to store it using SP because there is only such instructions for store/load of a word. What we would want to do is to move SP into a Mips 16 register and then do a indexed load/store off of that
2013 Nov 23
0
[LLVMdev] bugpoint question
----- Original Message ----- > From: "Reed Kotler" <rkotler at mips.com> > To: "Hal Finkel" <hfinkel at anl.gov> > Cc: LLVMdev at cs.uiuc.edu > Sent: Friday, November 22, 2013 11:18:53 PM > Subject: Re: bugpoint question > > In that case it tries to do something but fails. > > rkotler at ubuntu-rkotler:~/testmips16$ >
2012 Sep 21
2
[LLVMdev] mips16 puzzle
Actually, SP is already not in the mips 16 register class but there is some C++ code that is common to mips32, mips64 and mips16 that is wanting to use SP. It's kind of awkward but does work except in this case of load/store haflword and byte to stack objects. Maybe I'm shooting myself in the foot there. I don't know that code too well so maybe I need to look into it. There are
2013 Feb 06
2
[LLVMdev] register scavenging
So what I realized is that you can't use the simple scavenger trick where you create the virtual register and use the more advanced features. This is because you can't call forward() in any form if there are virtual registers being used by any of the instructions in the basic block. This will cause forward to fail. Maybe this is a bug in forward() On 02/05/2013 02:51 PM, Reed Kotler
2012 Sep 26
0
[LLVMdev] mips16 puzzle
Ok. That's a somewhat different problem, then. Devil will be in the details of what you want to do. A few options. First is to always have a standard frame pointer register available and reference off of that. Caveat: dynamic stack realignment and vararrays muck with that more than a bit. Second is what gcc is doing and reserve a register just for this in addition to the frame register.
2013 Mar 27
1
[LLVMdev] LLVM pass question
So the switching between mips16 and mips32 on a per function basis seems to basically be working except that asm printer has some kind of issue here. I'm debugging that now. I get this: lc: /home/rkotler/workspace/llvmpb6/include/llvm/MC/MCStreamer.h:224: void llvm::MCStreamer::SwitchSection(const llvm::MCSection*): Assertion `Section && "Cannot switch to a null