similar to: [LLVMdev] [3.3 Release] Release Candidate 1 Sources Available

Bill Wendling <wendling at apple.com> wrote: > Please test out these sources and create bug reports for any > problems you encounter (http://llvm.org/bugs/) --- and please CC me > on those bug reports. The RC looks good on SystemZ; all projects/test-suite tests pass. There are still two failing tests in the regression suite: LLVM :: DebugInfo/namespace.ll This was already

Richard Sandiford wrote: >I'd like to step down as code owner for the SystemZ port and nominate >Ulrich Weigand to take over. Sorry for not doing this sooner. I'd be happy to take over that role. Thanks for all your work on SystemZ, Richard! Bye, Ulrich

Hans Wennborg wrote: >Dear testers, > >8.0.0-rc4 was just tagged from the release_80 branch at r355690. I've tested the current branch on SystemZ without problems. I noticed I forgot to send a ReleaseNotes updates, sorry. If there's still time, here's a list of the major user-visible changes: (See attached file: systemz-releasenotes.diff) Mit freundlichen Gruessen / Best

Hi Hal, I only just noticed that about a year ago, Jim removed CPU auto-detection for the X86 target: http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-April/071991.html http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20140407/212676.html >Currently the X86 backend does CPU auto-detection and subtarget feature >detection when the TargetMachine is created if no explicit CPU was

Andrew Kaylor wrote: >In general, the current "strict FP" handling stops at instruction >selection. At the MachineIR level we don't currently have a mechanism >to prevent inappropriate optimizations based on floating point >constraints, or indeed to convey such constraints to the backend. >Implicit register use modeling may provide some restriction on some

Hello, as discussed here in more detail: https://reviews.llvm.org/D81583 the introduction of the C++20 [[no_unique_address]] attribute exposes an ABI issue on platforms that require special handling for structs/classes that are "equivalent" to a single floating-point member (or in some cases, a "homogeneous" set of floating-point members). This is because we can now for the

Hal Finkel <hfinkel at anl.gov> wrote on 23.03.2015 19:42:06: > > >Attached are draft patches that do this for X86. Similar but smaller > > >cleanups can also be done for SystemZ and PowerPC if it’s agreed > > >this is a good idea. > > > > However, this was then never implemented for SystemZ and PowerPC. > > Should we do so as well? > >

Csaba Raduly <rcsaba at gmail.com> wrote: > error: no disassembler for target s390x--linux-gnu The SystemZ disassembler was only recently added. To process major changes to the source tree like the addition of a completely new component, it seems to be necessary to explicitly re-run configure (or sometimes even remove the build directory completely and start from scratch). I've

Hi, Two days ago, the test suite started failing. Initially there were hundreds of failing tests; now only seven remain. They appear to be related to SystemZ. Here's the last failed test: ******************** FAIL: LLVM :: MC/Disassembler/SystemZ/unmapped.txt (11484 of 14435) ******************** TEST 'LLVM :: MC/Disassembler/SystemZ/unmapped.txt' FAILED ******************** Script:

> On Jan 9, 2018, at 1:53 PM, Kaylor, Andrew via cfe-dev <cfe-dev at lists.llvm.org> wrote: > > I think we’re going to need to create a new mechanism to communicate strict FP modes to the backend. I think we need to avoid doing anything that will require re-inventing or duplicating all of the pattern matching that goes on in instruction selection (which is the reason we’re

Many thanks! On Fri, Aug 14, 2015 at 6:47 AM, Ulrich Weigand <Ulrich.Weigand at de.ibm.com> wrote: > LLVM: > > LLVM no longer attempts to automatically detect the > current host CPU when invoked natively. > > LLVM now supports all thread-local storage models on SystemZ. > (Previous releases would support only the local-exec TLS model.) > > LLVM now uses the POPCNT

I think we're going to need to create a new mechanism to communicate strict FP modes to the backend. I think we need to avoid doing anything that will require re-inventing or duplicating all of the pattern matching that goes on in instruction selection (which is the reason we're currently dropping that information). I'm out of my depth on this transition, but I think maybe we could

On Tue, Jan 09, 2018 at 06:53:51PM +0000, Kaylor, Andrew via cfe-dev wrote: > I think we're going to need to create a new mechanism to communicate > strict FP modes to the backend. I think we need to avoid doing anything > that will require re-inventing or duplicating all of the pattern > matching that goes on in instruction selection (which is the reason >

Hi, I wonder if anyone has any comment on a patch like: diff --git a/lib/CodeGen/SelectionDAG/InstrEmitter.cpp b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp index 65ee3816f84..4780f6f0e59 100644 --- a/lib/CodeGen/SelectionDAG/InstrEmitter.cpp +++ b/lib/CodeGen/SelectionDAG/InstrEmitter.cpp @@ -243,18 +243,21 @@ void InstrEmitter::CreateVirtualRegisters(SDNode *Node,      if (!VRBase &&

>The standard argument against trying to introduce "scope-like" mechanisms to LLVM IR is inlining; >unless you're going to prevent functions that use stricter/laxer FP rules from being inlined >into >each other (which sounds disastrous), you're going to need to communicate strictness on an >instruction-by-instruction basis. If the backend wants to handle that by

Hello, this set of patches adds SystemZ support to base LLVM. This is split up into three patches just to simplify review; they should be committed as a single change if approved. The first patch adds SystemZ support to the configure logic and support for the systemz Triple. This ought to be straightfoward. The second patch adds changes to LLVM common code required to support the SystemZ ELF

On 9 Jan 2018 22:55, "John McCall via llvm-dev" <llvm-dev at lists.llvm.org> wrote: On Jan 9, 2018, at 3:50 PM, Kaylor, Andrew <andrew.kaylor at intel.com> wrote: >The standard argument against trying to introduce "scope-like" mechanisms to LLVM IR is inlining; >unless you're going to prevent functions that use stricter/laxer FP rules from being inlined

Hi, It has been discovered recently that it is needed for the SystemZ backend to add super-regs to the callee saved regs list like: def CSR_SystemZ : CalleeSavedRegs<(add (sequence "R%dD", 6, 15), - (sequence "F%dD", 8, 15))>; + [R6Q, R8Q, R10Q, R12Q, R14Q], +

Hello, as of Jul 9, the LNT build bot on SystemZ shows red. The problem occurs in the "setup lit" test, which fails due to: Processing dependencies for LNT==0.4.2.dev0 Searching for typing Reading https://pypi.org/simple/typing/ Downloading

> From: Krzysztof Parzyszek [kparzysz at codeaurora.org] > On 3/4/2015 10:30 AM, Daniel Sanders wrote: > > > > Partial support for ZC is in my working copy at the moment. I've attached my WIP patches. > > Should have guessed that, ha. > > I've looked into this. My idea was to expand the single address operand > of the inline-asm SDNode into two: base