similar to: [LLVMdev] help decompiling x86 ASM to LLVM IR

Displaying 20 results from an estimated 3000 matches similar to: "[LLVMdev] help decompiling x86 ASM to LLVM IR"

2013 Mar 12
0
[LLVMdev] help decompiling x86 ASM to LLVM IR
James Courtier-Dutton <james.dutton at gmail.com> writes: > I am looking to decompile x86 ASM to LLVM IR. > The original C is this: > int test61 ( unsigned value ) { > int ret; > if (value < 1) > ret = 0x40; > else > ret = 0x61; > return ret; > } > > It compiles with GCC -O2 to (rather
2013 Mar 12
0
[LLVMdev] help decompiling x86 ASM to LLVM IR
On 3/12/2013 11:20 AM, James Courtier-Dutton wrote: > It compiles with GCC -O2 to (rather cleverly removing any branches): > 0000000000000000 <test61>: > 0: 83 ff 01 cmp $0x1,%edi > 3: 19 c0 sbb %eax,%eax > 5: 83 e0 df and $0xffffffdf,%eax > 8: 83 c0 61 add $0x61,%eax >
2013 Mar 12
1
[LLVMdev] help decompiling x86 ASM to LLVM IR
On 3/12/13 11:39 AM, Óscar Fuentes wrote: > James Courtier-Dutton <james.dutton at gmail.com> writes: > >> I am looking to decompile x86 ASM to LLVM IR. >> The original C is this: >> int test61 ( unsigned value ) { >> int ret; >> if (value < 1) >> ret = 0x40; >> else >> ret =
2013 Jun 28
3
[LLVMdev] Question regarding the x86 SBB instruction.
Hi, I have the x86 SBB instruction. how should I represent this in LLVM IR. (as part of a decompiler from binary to LLVM IR) Pre-conditions: %eax = 0xffffffff %edx = 0xffffffff %carry = 1 SBB %eax, %edx // %edx is the destination doing %edx = %edx - (%eax + carry) JC jump_destination1 // If the Carry flag is set, jump to jump_destination1 How do I represent this correctly in LLVM
2013 Jun 28
0
[LLVMdev] Question regarding the x86 SBB instruction.
Look at the __builtin_addc* builtins in clang. I am currently working on an optimization which transforms said intrinsics into chains of ADCs/SBBs. Michael On Jun 28, 2013, at 5:51 AM, James Courtier-Dutton <james.dutton at gmail.com> wrote: > Hi, > > I have the x86 SBB instruction. how should I represent this in LLVM > IR. (as part of a decompiler from binary to LLVM IR)
2012 May 07
0
[LLVMdev] Using LLVM for decompiling.
On 5/7/2012 11:45 AM, James Courtier-Dutton wrote: > On 7 May 2012 16:31, John Criswell<criswell at illinois.edu> wrote: >> Given that you've completed steps one and two (i.e., you've converted the >> binary instructions to LLVM IR and then discovered basic blocks), then yes, >> LLVM's current analysis passes should help you with this third step. LLVM
2012 May 07
6
[LLVMdev] Using LLVM for decompiling.
On 7 May 2012 16:31, John Criswell <criswell at illinois.edu> wrote: > On 5/7/12 5:47 AM, James Courtier-Dutton wrote: >> >> Hi, >> >> I am writing a decompiler. I was wondering if some of LLVM could be >> used for a decompiler. >> There are several stages in the decompiler process. >> 1) Take binary and create a higher level representation of it.
2012 May 07
6
[LLVMdev] Using LLVM for decompiling.
Hi, I am writing a decompiler. I was wondering if some of LLVM could be used for a decompiler. There are several stages in the decompiler process. 1) Take binary and create a higher level representation of it. Like RTL. 2) The output is then broken into blocks or nodes, each block ends in a CALL, JMP, RET, or 2-way or multiway conditional JMP. 3) The blocks or nodes are then analyzed for
2013 Mar 12
4
[LLVMdev] help decompiling x86 ASM to LLVM IR
On 12 March 2013 16:39, Óscar Fuentes <ofv at wanadoo.es> wrote: > > This is not possible, except for specific cases. > > Consider this code: > > long foo(long *p) { > ++p; > return *p; > } > > The X86 machine code would do something like > > add %eax, 4 > > for `++p', but for x86_64 it would be > > add %rax, 8 > > But you
2012 May 07
0
[LLVMdev] Using LLVM for decompiling.
> -----Original Message----- > On Behalf Of James Courtier-Dutton > To: John Criswell > > On 7 May 2012 16:31, John Criswell <criswell at illinois.edu> wrote: > > On 5/7/12 5:47 AM, James Courtier-Dutton wrote: > >> > >> Hi, > >> > >> I am writing a decompiler. I was wondering if some of LLVM could be > >> used for a
2012 May 07
0
[LLVMdev] Using LLVM for decompiling.
On 5/7/12 5:47 AM, James Courtier-Dutton wrote: > Hi, > > I am writing a decompiler. I was wondering if some of LLVM could be > used for a decompiler. > There are several stages in the decompiler process. > 1) Take binary and create a higher level representation of it. Like RTL. > 2) The output is then broken into blocks or nodes, each block ends in > a CALL, JMP, RET, or
2013 Mar 12
0
[LLVMdev] help decompiling x86 ASM to LLVM IR
On 3/12/2013 11:55 AM, James Courtier-Dutton wrote: > I already know how to handle the case you describe. > I am not converting ASM to LLVM IR without doing quite a lot of analysis first. > 1) I can already tell if a register is refering to a pointer or an > integer based on how it is used. Does it get de-referenced or not? So, > I would know that "p" is a pointer. What if
2005 Jan 23
1
Experimental FreeBSD ports / packages for test61
Hello, If anyone would like it I have provided a Dovecot 1.0 test61 port and package for FreeBSD 5.3 here. I made them for my own experimentation but thought they might be interesting to others I suppose. http://www.helenmarks.co.uk/~dom/dovecot/ These deviate from the stock test61 because I've updated and added a patch I wrote a long time ago for ioloop kqueue/kevent support in
2013 Mar 12
1
[LLVMdev] help decompiling x86 ASM to LLVM IR
On 12 March 2013 17:10, Joshua Cranmer 🐧 <Pidgeot18 at gmail.com> wrote: > On 3/12/2013 11:55 AM, James Courtier-Dutton wrote: >> > >> 2) From the binary, I would know if it was for 32bit or 64bit. >> 3) I could then use (1) and (2) to know if "add %rax, 8" is "p = p + >> 1" (64bit long), or "p = p + 2(32bit long)" >> >>
2017 Jan 24
7
[X86][AVX512] RFC: make i1 illegal in the Codegen
Hi All, AVX-512 introduced the K mask registers and masked operations which make a natural choice for legalizing vectors of i1's. For example, define <8 x i32> @foo(<8 x i32>%a, <8 x i32*> %p) { %r = call <8 x i32> @llvm.masked.gather.v8i32(<8 x i32*> %p, i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>,
2012 Sep 13
5
[LLVMdev] [OT] Control Flow Graph(CFG) into Abstract Syntax Tree(AST)
Hi, I know most compilers go from AST to CFG. I am writing a decompiler, so I was wondering if anyone knew of any documents describing how best to get from CFG to AST. The decompiler project is open source. https://github.com/jcdutton/libbeauty The decompiler already contains a disassembler and a virtual machine resulting in an annotated CFG. It uses information gained from using a virtual
2014 May 13
2
[LLVMdev] Missed optimization opportunity in 3-way integer comparison case
While looking at what llvm writes for this testcase, I noticed that there is one redundant operation in resulting assembly. The second 'cmp' operation there is essentially identical to the first one, with reversed order of arguments. Therefore, it is not needed. This testcase is a simple integer comparison routine, similar to what qsort would take to sort an integer array. I think
2005 Jan 26
1
mbox slowness in dovecot-1.0-test61
Hi, We're trying out Dovecot to see if it's a good replacement for UW-imapd. It seems to be very slow in opening an mbox file, even after it's been indexed. (I mean way slower than UW) Here's some info on the system: Dovecot-1.0-test61 SuSE 8.1, Linux kernel 2.4 Using NFS to access mail. I've tried turning off mmap, using dotlocking, using fcntl locking (lockd, etc. are
2005 Jan 30
1
kqueue errors in maillog
Hello Dovecot, Version: dovecot-1.0-test61 OS: FreeBSD 5.3-RELEASE i386 Client: Mozilla Thunderbird 1.0 (on WinXP, FreeBSD & Mac OS X) The maillog entries concerning me: - Jan 30 16:16:37 venus dovecot: imap-login: Login: user [10.6.8.3] Jan 30 16:16:37 venus dovecot: imap-login: couldn't remove filter with kqueue: Bad file descriptor Jan 30 16:16:37 venus dovecot: IMAP(user):
2013 Apr 21
2
[LLVMdev] Testing methods
Hi, What does llvm use for testing. The area of testing I am interested in are how to test the accuracy of the assembler/disassembler. So, if you take an IR level instruction. How do you verify that the generated CPU specific instruction is correct? Is there an automated method for this? I wish to implement automated testing on a decompiler I am writing, and thought that the test methods used in