Displaying 20 results from an estimated 500 matches similar to: "[LLVMdev] parallel loop metadata simplification"
2013 Mar 01
0
[LLVMdev] parallel loop metadata simplification
----- Original Message -----
> From: "Paul Redmond" <paul.redmond at intel.com>
> To: "llvmdev at cs.uiuc.edu Dev" <llvmdev at cs.uiuc.edu>
> Sent: Thursday, February 28, 2013 1:30:57 PM
> Subject: [LLVMdev] parallel loop metadata simplification
>
> Hi,
>
> I've been working on clang codegen for #pragma ivdep and creating the
>
2013 Mar 01
2
[LLVMdev] Interesting post increment situation in DAG combiner
Hal, (and everyone who might care about post increment generation)...
I have an interesting question/observation. Consider this vector loop.
void vec_add_const(unsigned N, short __attribute__ ((aligned (16))) *A,
short __attribute__ ((aligned (16))) val)
{
unsigned i,j;
for (i=0; i<N; i++) {
for (j=0; j<N; j++) {
A[i*N+j] += val;
}
}
}
The
2013 Mar 01
0
[LLVMdev] Interesting post increment situation in DAG combiner
----- Original Message -----
> From: "Sergei Larin" <slarin at codeaurora.org>
> To: "Hal Finkel" <hfinkel at anl.gov>
> Cc: llvmdev at cs.uiuc.edu
> Sent: Friday, March 1, 2013 10:24:39 AM
> Subject: Interesting post increment situation in DAG combiner
>
> Hal, (and everyone who might care about post increment generation)...
Sergei,
Perhaps
2013 Mar 01
1
[LLVMdev] Interesting post increment situation in DAG combiner
Hal,
Here is my patch for the post inc case. I think it is symmetrically applicable to the pre-inc, but I have not tested it for that.
I think you can clearly see my intent here - I simply select the "latest" candidate when multiple are available.
Who else might be interested in this?
Sergei
---
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The
2013 Mar 11
2
[LLVMdev] How to unroll reduction loop with caching accumulator on register?
Dear all,
Attached notunrolled.ll is a module containing reduction kernel. What I'm
trying to do is to unroll it in such way, that partial reduction on
unrolled iterations would be performed on register, and then stored to
memory only once. Currently llvm's unroller together with all standard
optimizations produce code, which stores value to memory after every
unrolled iteration, which is
2013 Mar 11
0
[LLVMdev] How to unroll reduction loop with caching accumulator on register?
I tried to manually assign each of 3 arrays a unique TBAA node. But it does
not seem to help: alias analysis still considers arrays as may-alias, which
most likely prevents the desired optimization. Below is the sample code
with TBAA metadata inserted. Could you please suggest what might be wrong
with it?
Many thanks,
- D.
marcusmae at M17xR4:~/forge/llvm$ opt -time-passes -enable-tbaa -tbaa
2013 Mar 01
2
[LLVMdev] parallel loop metadata simplification
Hi Hal,
On 2013-02-28, at 9:33 PM, Hal Finkel wrote:
> ----- Original Message -----
>> From: "Paul Redmond" <paul.redmond at intel.com>
>> To: "llvmdev at cs.uiuc.edu Dev" <llvmdev at cs.uiuc.edu>
>> Sent: Thursday, February 28, 2013 1:30:57 PM
>> Subject: [LLVMdev] parallel loop metadata simplification
>>
>> Hi,
>>
2013 Mar 01
2
[LLVMdev] parallel loop metadata simplification
On 2013-03-01, at 11:35 AM, Hal Finkel wrote:
> ----- Original Message -----
>> From: "Paul Redmond" <paul.redmond at intel.com>
>> To: "Hal Finkel" <hfinkel at anl.gov>
>> Cc: "llvmdev at cs.uiuc.edu Dev" <llvmdev at cs.uiuc.edu>
>> Sent: Friday, March 1, 2013 10:06:51 AM
>> Subject: Re: [LLVMdev] parallel loop
2013 Feb 28
0
[LLVMdev] parallel loop metadata simplification
Hi Paul,
On 02/28/2013 09:30 PM, Redmond, Paul wrote:
> I'd like to reopen the discussion on requiring the
> llvm.mem.parallel_loop_access metadata. I understand the reason for the
> metadata is to protect against transformations that may introduce unsafe
> parallel memory accesses (the reg2mem example.) I'm wondering if perhaps we
> can make the metadata more user-friendly
2013 Mar 01
0
[LLVMdev] parallel loop metadata simplification
----- Original Message -----
> From: "Paul Redmond" <paul.redmond at intel.com>
> To: "Hal Finkel" <hfinkel at anl.gov>
> Cc: "llvmdev at cs.uiuc.edu Dev" <llvmdev at cs.uiuc.edu>
> Sent: Friday, March 1, 2013 10:06:51 AM
> Subject: Re: [LLVMdev] parallel loop metadata simplification
>
> Hi Hal,
>
> On 2013-02-28, at 9:33
2013 Mar 01
0
[LLVMdev] parallel loop metadata simplification
----- Original Message -----
> From: "Paul Redmond" <paul.redmond at intel.com>
> To: "Hal Finkel" <hfinkel at anl.gov>
> Cc: "llvmdev at cs.uiuc.edu Dev" <llvmdev at cs.uiuc.edu>
> Sent: Friday, March 1, 2013 10:49:24 AM
> Subject: Re: [LLVMdev] parallel loop metadata simplification
>
>
> On 2013-03-01, at 11:35 AM, Hal
2013 Mar 01
3
[LLVMdev] parallel loop metadata simplification
----- Original Message -----
> From: "Hal Finkel" <hfinkel at anl.gov>
> To: "Paul Redmond" <paul.redmond at intel.com>
> Cc: "llvmdev at cs.uiuc.edu Dev" <llvmdev at cs.uiuc.edu>
> Sent: Friday, March 1, 2013 11:13:06 AM
> Subject: Re: [LLVMdev] parallel loop metadata simplification
>
> ----- Original Message -----
> >
2015 Jul 16
3
[LLVMdev] why LoopUnswitch pass does not constant fold conditional branch and merge blocks
Hi,
I have a general question on LoopUnswtich pass.
Consider the following IR snippet:
define i32 @test(i1 %cond) {
br label %loop_begin
loop_begin:
br i1 %cond, label %loop_body, label %loop_exit
loop_body:
br label %do_something
do_something:
call void @some_func() noreturn nounwind
br label %loop_begin
loop_exit:
ret i32 0
}
declare void @some_func() noreturn
After running
2011 Jan 26
2
Dealing with R list objects in C/C++
Hi,
I'd like to construct an R list object in C++, fill it with relevant data, and pass it to an R function which will return a different list object back. I have browsed through all the R manuals, and examples under tests/Embedding, but can't figure out the correct way. Below is my code snippet:
#include <Rinternals.h>
// Rf_initEmbeddedR and other setups already performed
2001 Sep 10
1
not safe to return vector pointer
Hello All,
I recently upgraded from R-1.1.1 to R-1.2.2.
I have an R function that uses .Call() to
return a list from C code. The C code
has the form:
SEXP function(SEXP var)
{
SEXP rlist ;
PROTECT(rlist = NEW_LIST(3)) ;
VECTOR_PTR(rlist)[0] = NEW_INTEGER(1) ;
VECTOR_PTR(rlist)[1] = NEW_STRING(1) ;
...
UNPROTECT(1) ;
return(rlist) ;
}
When I try to
2013 May 23
3
[LLVMdev] LLVM Loop Vectorizer puzzle
On 05/23/2013 06:52 PM, Redmond, Paul wrote:
> I'm not even sure you would need the llvm.loop.parallel anymore since the
> vectorizer could just look to see if the loop id on a parallel_loop_access
> matches the loop id of the loop being vectorized.
>
> Does this make any sense?
Yes. However, I think you still need use the self-referencing
metadata trick or similar to make the
2013 Jan 31
0
[LLVMdev] [PATCH] parallel loop metadata
Dear all,
Here's an updated version of the parallel loop metadata patch.
It includes documentation for the new metadata types with
a semantics description.
--
Pekka
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2015 Mar 19
2
[LLVMdev] [LV] possible `vector.memcheck` regression when using `llvm.loop` and `llvm.mem.parallel_loop_access`
Adam,
Please find the attached test case (run with ToT opt -O3). As you can see,
`y_body` successfully is vectorized, though %33 and %46 are deemed MayAlias
despite their exclusive use in loads ands stores marked with
`llvm.mem.parallel_loop_access`.
Many Thanks,
Josh
On Thu, Mar 19, 2015 at 12:55 PM, Adam Nemet <anemet at apple.com> wrote:
>
> > On Mar 19, 2015, at 9:43 AM,
2013 Jan 30
3
[LLVMdev] [PATCH] parallel loop metadata
On Wed, Jan 30, 2013 at 12:35 PM, Pekka Jääskeläinen
<pekka.jaaskelainen at tut.fi> wrote:
> Thank you all for comments,
>
>
> On 01/30/2013 11:22 AM, David Tweed wrote:
>>
>> In a personal capacity I'm quite interested in the issues of producing
>> from a
>> high-level language some LLVM IR which is labelled with vectorization info
>> (including
2015 Mar 19
2
[LLVMdev] [LV] possible `vector.memcheck` regression when using `llvm.loop` and `llvm.mem.parallel_loop_access`
It seems that at some point in the not-so-distant-past that the loop
vectorizer gained the ability to vectorize loops without explicit
`llvm.loop` & `llvm.mem.parallel_loop_access` metadata. While that's
awesome, there seems to be a regression in that
`llvm.mem.parallel_loop_access` metadata doesn't make it into the alias
analysis, and therefore a `vector.memcheck` basic block is