similar to: [LLVMdev] backend documentation

Hi, clang -O3 -target thumbv7-eabi -emit-llvm ... llc ... -debug -O3 -code-model=small -march=thumb -mcpu=cortex-m3 ... Does generate slightly better code, but it still computes 7 xor + 7 and. Anyway this should be a target independent optimization isn't it ?? Cheers Sebastien On 2013-02-04 16:46, Bill Wendling wrote: > Have you tried armv7? > > -bw > > On Feb 2,

What about benchmarks on other Arm devices? On 02/26/2013 02:52 PM, Jim Grosbach wrote: > Cortex-M0 is a Thumb1 only device. There hasn't been any concerted > effort to tune LLVM's Thumb1 output in quite a long time. Even back then > (2008 or so), the effort was mainly to get it to work acceptably, with > the real performance tuning work being done for Thumb2. I'm not >

Cortex-M0 is a Thumb1 only device. There hasn't been any concerted effort to tune LLVM's Thumb1 output in quite a long time. Even back then (2008 or so), the effort was mainly to get it to work acceptably, with the real performance tuning work being done for Thumb2. I'm not surprised that an embedded market focussed compiler like IAR is better tuned for a chip like that. -Jim On Feb

Hi, I didn't do any serious benchmarking but so far I never found a case where LLVM does better than IAR on CortexM0, but I saw a lot of cases where IAR output is better than LLVM... That said I did not use -Os or -Oz, I just used -O3. A recurrent situation is that LLVM push/pop one or two extra registers compared to IAR, I guess it does so in order to comply with a standard ABI or

I've not run any on non-iOS devices, and haven't looked at GCC since v4.2.1 due to licensing issues, so I don't have a good feel for comparative benchmarking. -Jim On Feb 26, 2013, at 4:20 PM, Reed Kotler <rkotler at mips.com> wrote: > What about benchmarks on other Arm devices? > > On 02/26/2013 02:52 PM, Jim Grosbach wrote: >> Cortex-M0 is a Thumb1 only

Have you tried armv7? -bw On Feb 2, 2013, at 3:50 PM, matic at nimp.co.uk wrote: > I gave the following function to IAR compiler (targeting CortexM0) and to clang/LLVM 3.2 (clang -O3 -target thumbv6-eabi -emit-llvm) > > int calleeSave8(int in[]){ > int out=0; > int i; > for(i=0;i<8;i++){ > out ^= in[i] & in[(i+1)%8]; > }//expand to out =

I gave the following function to IAR compiler (targeting CortexM0) and to clang/LLVM 3.2 (clang -O3 -target thumbv6-eabi -emit-llvm) int calleeSave8(int in[]){ int out=0; int i; for(i=0;i<8;i++){ out ^= in[i] & in[(i+1)%8]; }//expand to out = (in[0]&in[1])^(in[1]&in[2])^(in[2]&in[3])^(in[3]&in[4])^(in[4]&in[5])^(in[5]&in[6])^(in[6]&in[7])^(in[7]&in[0])

I haven't tried using -Os/z on any ARM device for the last 3 years, and back then, -Os would break many things. People normally care about code size on Cortex-R/M and ARM9 or older, and in there, not many LLVM users. --renato On 27 February 2013 00:38, Jim Grosbach <grosbach at apple.com> wrote: > I've not run any on non-iOS devices, and haven't looked at GCC since >

On Sun, Feb 24, 2013 at 10:25 AM, Reed Kotler <rkotler at mips.com> wrote: > Most people learn LLVM by trying to do something with it and not just > reading about it. I wonder if there would be any interest in an annual (or some reasonable interval) "workshop" sort of thing that teaches backend development. That may be a better learning medium for this material than a book.

Hi, everyone, The paper submission deadline for this year's LLVM in HPC workshop has been further extended to September 14th (AoE). We're looking for a few additional submissions, so if you have anything that could be submitted as a paper by the beginning of next week, please take advantage of this opportunity. If you have any questions, please let me know. SC20 is now a virtual

**** WORKSHOPS at ACM HPDC 2012 **** http://www.hpdc.org/2012/workshops/ The ACM International Symposium on High-Performance Parallel and Distributed Computing (HPDC) is the premier annual conference on the design, the implementation, the evaluation, and the use of parallel and distributed systems for high-end computing. HPDC'12 will take place in Delft, the Netherlands, a historical,

**** WORKSHOPS at ACM HPDC 2012 **** http://www.hpdc.org/2012/workshops/ The ACM International Symposium on High-Performance Parallel and Distributed Computing (HPDC) is the premier annual conference on the design, the implementation, the evaluation, and the use of parallel and distributed systems for high-end computing. HPDC'12 will take place in Delft, the Netherlands, a historical,

CALL FOR PAPERS ================================================================= LLVM-HPC2016: The Third Workshop on the LLVM Compiler Infrastructure in HPC http://llvm-hpc3-workshop.github.io/ November 14th, 2016, Salt Lake City, UT In conjunction with the 2016 ACM/IEEE Supercomputing Conference (SC16)

The workshop organizing committee of the Southern California Chapter of the American Statistical Association announces the 28th Annual Workshop in Applied Statistics. Professor Colin Cameron from the department of Economics at UC Davis will give a one-day workshop titled "Advances in Count Data Regression." The event will take place on Saturday, March 28, 2009 at UCLA. Details on

CALL FOR PAPERS ================================================================= LLVM-HPC2: The Second Workshop on the LLVM Compiler Infrastructure in HPC http://llvm-hpc2-workshop.github.io/ November 15th, 2015, Austin, TX In conjunction with the 2015 ACM/IEEE Supercomputing Conference (SC'15)

Hi, I would like to execute a MachineFunctionPass after all other passes which modify the machine code. In other words, if we call llc to generate assembly file, that pass should run right before the "Assembly Printer" pass. Is there any official way to enforce this ? Best regards, Sebastien

Call For Papers RUXCON would like to announce the call for papers for the third annual RUXCON conference. Breaking from the RUXCON tradition of having the conference in winter months, this year the conference will be ran during the 1st and 2nd of October. As with previous years, RUXCON will be held at the University of Technology, Sydney, Australia. The dead line for submissions is the 31st

**** CALL FOR PAPERS **** **** CALL FOR WORKSHOP PROPOSALS **** The 21st International ACM Symposium on High-Performance Parallel and Distributed Computing (HPDC'12) Delft University of Technology, Delft, the Netherlands June 18-22, 2012

**** CALL FOR PAPERS **** **** CALL FOR WORKSHOP PROPOSALS **** The 21st International ACM Symposium on High-Performance Parallel and Distributed Computing (HPDC'12) Delft University of Technology, Delft, the Netherlands June 18-22, 2012

Hi, I got that message from a call to InstrEmitter::AddOperand. I am writing a back end for CortexM0 (for self teaching purposes), I am working on LDR with immediate offset instruction. In the ARM backend, if the offset is 0, the following code is executed by the function ARMDAGToDAGISel::SelectThumbAddrModeImm5S Base = N.getOperand(0); OffImm = CurDAG->getTargetConstant(0, MVT::i32);