similar to: [LLVMdev] backend documentation

Displaying 20 results from an estimated 2000 matches similar to: "[LLVMdev] backend documentation"

2012 Sep 07
0
[LLVMdev] : trouble with compiling
Vadim Khoptynets <vadya.poiuj at gmail.com> writes: > Hello, Óscar! > > I had some problems with my machine, so I've reistalled system and LLVM > repository. And now, I have another trouble during compilation: > make[1]: Entering directory `/media/data/dev/llvm/bin/tools/llvm-config' > llvm[1]: Constructing LLVMBuild project information. > /usr/bin/env: python:
2013 Feb 24
4
[LLVMdev] backend documentation
Hello everyone! Is there any documentation about LLVM backend implementation, except "Writing an LLVM backend"? I'm trying to write InstrFormats.td and InstrInfo.td for my backend now. After reading "Writing an LLVM backend" and "Creating an LLVM Backend for the Cpu0 Architecture", many black holes have remained. These tutorials describe it on concrete examples,
2012 Aug 18
2
[LLVMdev] : trouble with compiling
Hello to everyone! I've configured LLVM by "../llvm/configure". But when I run "gmake", I receive compilation error: llvm[2]: Linking Debug+Asserts executable llvm-tblgen /home/poiuj/dev/llvm/build/Debug+Asserts/lib/libLLVMSupport.a(FormattedStream.o):(.debug_loc+0x2a8): undefined reference to `.LCfI21' collect2: error: ld returned 1 exit status gmake[2]: ***
2013 Feb 24
0
[LLVMdev] backend documentation
The Sparc port is maybe the closest thing to a text book example at this time. You can study it; debug some examples and trace through things. It's very simple because nobody is working on the Sparc port to make it a commercial compiler for the Sparc platform; yet at the same time it has complex patterns, custom inserters etc and all the elements of a more serious port. Most people learn
2013 Apr 30
1
[LLVMdev] trouble with MCInstrInfo
Hello everyone! There is segmentation fault during translating a simple function with my backend. Investigation with gdb has shown that address of InstrNameData array in generated file MyTargetGenInstrInfo.inc is out of bounds. Also, if I run llc without -view-dag options, NumOpcodes equals 0 inside llvm::MCInstrInfo::get function, although there are some instructions (they are appeared in
2013 Feb 10
1
[LLVMdev] running tblgen
Hello everyone! Could somebody advice me, how can I run llvm-tblgen to get MyTargetGenRegisterInfo.inc file to include in MyTargerRegisterInfo.h ? Unfortunately, I haven't found this information in "Writing an LLVM Compiler Backend" and "TableGen Fundamentals". -- Regards, Vadim. -------------- next part -------------- An HTML attachment was scrubbed... URL:
2012 Sep 24
0
[LLVMdev] : new capabilities
On 9/22/12 9:01 AM, Vadim Khoptynets wrote: > Hello developers! > > Could you, please, inform me about actual open projects? Where can I > find this information? Does this list contains up to date information > http://llvm.org/OpenProjects.html#new ? I'm not sure if all of the information is up to date, but I suspect some of the items are still unimplemented. The best thing
2013 Feb 01
1
[LLVMdev] configure with new target
On Fri, Feb 1, 2013 at 4:01 PM, Tom Stellard <tom at stellard.net> wrote: > On Fri, Feb 01, 2013 at 04:43:59PM +0200, Vadim Khoptynets wrote: >> Hello everyone! >> >> I've started to implement a ColdFire backend, but there are some troubles >> during configuring: >> >> $ ../llvm/configure --enable-targets=x86,x86_64,coldfire >> ... >>
2013 Feb 01
0
[LLVMdev] configure with new target
On Fri, Feb 01, 2013 at 04:43:59PM +0200, Vadim Khoptynets wrote: > Hello everyone! > > I've started to implement a ColdFire backend, but there are some troubles > during configuring: > > $ ../llvm/configure --enable-targets=x86,x86_64,coldfire > ... > ... > ... > checking whether byte ordering is bigendian... no > configure: error: Unrecognized target
2012 Sep 09
0
[LLVMdev] : troubles during compiling
Hi Vadim, which compiler are you using to to the build, what platform are you on, how did you configure LLVM, clang etc ? Ciao, duncan. On 09/09/12 03:36, Vadim Khoptynets wrote: > Hello everyone! > > After I've checked out Clang and Compiler-RT repositories, I receive this error > during compilation: > > llvm[5]: Compiling PathDiagnostic.cpp for Debug+Asserts build >
2012 Dec 04
2
[LLVMdev] LLVM documentation work help
Sean, I add the empty file .nojekyll to https://github.com/Jonathan2251/lbd/tree/gh-pages and do "make gh-pages" again. It's the same. I check the uvbook has the gh-pages as mine as follows, https://github.com/nikhilm/uvbook/tree/gh-pages https://github.com/Jonathan2251/lbd/tree/gh-pages In addition to gh-pages, uvbook has the the other web site on
2013 Feb 01
3
[LLVMdev] configure with new target
Hello everyone! I've started to implement a ColdFire backend, but there are some troubles during configuring: $ ../llvm/configure --enable-targets=x86,x86_64,coldfire ... ... ... checking whether byte ordering is bigendian... no configure: error: Unrecognized target coldfire configure: error: ../../../llvm/projects/sample/configure failed for projects/sample I've added ColdFire to : 1)
2012 Sep 22
2
[LLVMdev] : new capabilities
Hello developers! Could you, please, inform me about actual open projects? Where can I find this information? Does this list contains up to date information http://llvm.org/OpenProjects.html#new ? -- Regards, Vadim. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120922/3db4debe/attachment.html>
2006 Apr 05
0
E-911 Canada Info - Hot Off the Press
This was given to me by a Telco guy in Canada. Talk about a great view of things to come. ESWG Consensus 12-month Report on Nomadic VoIP Technical and Operating Impediments to 9-1-1/E9-1-1 Service Delivery in Canada. PREPARE FOR 911 Executive Summary Emergency Services Working Group (ESWG) recommends on a consensus basis the Commission order the deployment of NENA Interim-2 (i2) compliant
2006 Apr 07
0
Canada Nomadic 911 - From the Yes it will Screw Your Biz Dept
ESWG Consensus 12-month Report on Nomadic VoIP Technical and Operating Impediments to 9-1-1/E9-1-1 Service Delivery in Canada Executive Summary Emergency Services Working Group (ESWG) recommends on a consensus basis the Commission order the deployment of NENA Interim-2 (i2) compliant emergency services components, systems and upgrades to result in the operation within 18 months of enhanced
2005 Oct 12
2
Canadian Association of VoIP Providers
My apologies for the cross-posting. If you are a business or individual providing Voice over IP services in Canada then we encourage you to read this email carefully otherwise please disregard. ----- As you are most likely aware, the CRTC has undertaken the roll of regulating VoIP services in Canada and is currently conducting hearings with the goal of putting in place regulatory requirements
2006 Apr 13
0
CANADA 911 Update
ESWG Consensus 12-month Report on Nomadic VoIP Technical and Operating Impediments to 9-1-1/E9-1-1 Service Delivery in Canada DRAFT Executive Summary Emergency Services Working Group (ESWG) recommends on a consensus basis the Commission order the deployment of NENA Internet-2 (i2) compliant emergency services components, systems and upgrades to result in the operation within 18 months of
2003 Apr 02
2
AW: Login from win2k client to samba PDC
John, thanks for that hint. It did not kill the server by you are perfectly right. I changed this and restarted the "smb" and "nmb" deamons - unfortunately with the same result. When I watch e.g. the status with "swat" I see as follows after trying with: smbclient -U <user> -L win2k1 (what is strange since I connect as different user and not
2012 Aug 16
2
[LLVMdev] TableGen related question for the Hexagon backend
Hi Everyone, After some more thoughts to the Jacob's suggestion of using multiclasses for Opcode mapping, this is what I have come up with. Please take a look at the design below and let me know if you have any suggestions/questions. I have tried to keep the design target independent so that other targets could benefit from it. 1) The idea is to add 3 new classes into
2009 Apr 24
1
[LLVMdev] Question from a passer-by
Hi all, Was wondering what is the real benefit of say translating from LLVM's RISC-type instruction set to the x86 which is a more CISC type of design? Especially after emitting said RISC stream from a much higher-level language like say C or C++? I always thought that to efficiently translate logic, as much as possible information has to be retained down the translation chain? Would that not