similar to: [LLVMdev] giving metadata a function parameter as an operand

On Tue, Feb 12, 2013 at 4:33 AM, Shemer, Anat <anat.shemer at intel.com> wrote: > Hi, > > Is it possible to give an instruction metadata that accepts function > argument as operand? The 2 functions are in the same module so the metadata > operand can be resolved. Here is how I imagine it should look like: > > define i32 @f(i32 %v) { > %v0 = call i32 @f1 (i32 %v,

Hi Andrew, The issue below refers to LSR, so I'll appreciate your feedback. It also refers to instruction combining and might impact backends other than X86, so if you know of others that might be interested you are more than welcome to add them. Thanks, Anat _____________________________________________ From: Shemer, Anat Sent: Tuesday, February 18, 2014 15:07 To: 'llvmdev at

Hi, If you are familiar with LegalizeTypes I will be glad if you can help me with the following scenario. I'm debugging some ll test that fails with an assertion in "void DAGTypeLegalizer::RemapValue(SDValue &N)" because it does not expect that a remap to a new node exists. However looking at the code for a while this seems to be a valid case. I see that many times nodes are

Hi, I want to encode Loongson ISA initially https://gist.github.com/xiangzhai/8ae6966e2f02a94e180dd16ff1cd60ac gslbx           $2,0($3,$4) It is equivalent to: dadd $1, $3, $4 lb $2,0($1) I just use  mem_simmptr  as the default value of  DAGOperand MO , because  MipsMemAsmOperand  use  parseMemOperand  to parse general  MemOffset  and only *one*  AnyRegister , for example: 0($1) But 

Klibc FTBFS with '-mno-odd-spreg' on mips32(el) platforms, As it try to save/restore odd-number FPR. Indeed no other architectures save/restore FPR at all. It shouldn't be needed. --- usr/klibc/arch/mips/setjmp.S | 24 ------------------------ 1 file changed, 24 deletions(-) diff --git a/usr/klibc/arch/mips/setjmp.S b/usr/klibc/arch/mips/setjmp.S index 68eed19..21e4115 100644 ---

Hello, I am not entirely sure the subject line captures what I am trying to do, but hopefully this description of the problem will help folks to see my challenge and hopefully offer constructive assistance. I have an experimental setup where I measure the decrease in oxygen in small vials as an organism, such as an oyster, consumes the oxygen. Each vial is calibrated before the experiment and

I have been using the following method to create L(x,t) x<-seq(1,66) time<-seq(1,19) v0<-.01 f0<-function(x,time) .45*cos(2*pi*3*x/66+v0*time) L0<-outer(x,time,f0) If I do image(L0) I get an x,t plot of a drifting cosine wave grating. The grating is actually a pattern of fuzzy bars; I have been ignoring the y dimension (because the grating is vertical: y has no effect on the

From: Dejan Latinovic <Dejan.Latinovic at imgtec.com> --- usr/include/arch/mips64/klibc/archconfig.h | 3 + usr/include/arch/mips64/klibc/archsetjmp.h | 39 ++++++ usr/include/arch/mips64/machine/asm.h | 76 ++++++++++ usr/include/fcntl.h | 2 +- usr/include/sys/md.h | 1 + usr/include/sys/resource.h | 4 +-

Hi, I am wondering how to make a function Fun to make the following work: t0 <- (paste("hgu133a", "ENTREZID", sep="")) xx <- as.list(Fun(t0)) # make it work like xx<-as.list(hgu133aENTREZID) thanks, -- Weiwei Shi, Ph.D Research Scientist GeneGO, Inc. "Did you always know?" "No, I did not. But I believed..." ---Matrix III

Hi, I noticed that klibc started crashing on 64-bit MIPS and in my quest to fix the bug I got a bit carried away and fixed a few other things as well. Here are various miscellaneous MIPS patches, although the first patch is the important one. Thanks, James *** BLURB HERE *** James Cowgill (5): mips64: compile with -mno-abicalls mips: use -Ttext-segment when linking shared library

When you use find, you can include related objects with include so that both objects get instantiated in the results, e.g. Foo.find(:all, :include => :bar). But when you use find_by_sql, is there a way to do this? You could definitely write the find_by_sql SQL to join Foo and Bar tables: Foo.find_by_sql("SELECT foo.*, bar.* from foo, bar where foo.bar_id = bar.id") But is there a

I am running into a problem when I turn on post-RA scheduler with mode "ANTIDEP_CRITICAL" for mips. I'd appreciate if someone could explain what is going wrong here. This is the basic block before post RA scheduling (at PostRASchedulerList.cpp:322): *(gdb) #3 0x0000000000ed3d26 in runOnMachineFunction (this=0x20aa470, Fn=...) at lib/CodeGen/PostRASchedulerList.cpp:322 322

You mean when I "explicity" use it by calling methods of register scavenger? Right now I'm just allocating virtual registers that will be resolved by the use of register scavenger and I'm also providing an override of the virtual method saveScavengerRegister. In Mips16, I have an extra mips 32 register (not usually very useful since it can only be used in a move instruction)

Just wanted to post updated versions of my last series/patches. Reviews welcomed. It would be also nice if we agree on features I should focus upstreaming, so that this work can be better splitted or reordered. Sadly most of my patches depend on the rather big clk subdev rework and I think those patches shows best, why I think this rework is actually needed and makes things much easier to add

Adds Nouveau controlled thermal throttling for Kepler+ GPUs. With this I feel safe enough to add support for Maxwell2 reclocking later on (still hidden behind a switch, but we can be fairly sure to not overheat hardware if a user isn't carefull enough) Contains all patches from my clk update series, but I thought it makes sense to include those in this series as well for completness. Please

Hi, I have a system of ODE's I can solve with lsoda. Model=function(t,x,parms) { #parameter definitions lambda=parms[1]; beta=parms[2]; d = parms[3]; delta = parms[4]; p=parms[5]; c=parms[6] xdot[1] = lambda - (d*x[1])- (beta*x[3]*x[1]) xdot[2] = (beta*x[3]*x[1]) - (delta*x[2]) xdot[3] = (p*x[2]) - (c*x[3]) return(list(xdot)) } I want

hi, Dear Evan Cheng: My cpu is i32 embeded CPU. I define pseudo register pair registers. In mytargetRegisterInfo.td: def T0: RegisterWithSubRegs<"t0",[R0,R1]>; ... def GPR64 : RegisterClass<"mytarget", [i64], 64, [T0, T1.....] In mytargetISelLowering.cpp: I define i1, i8 , i16 and i32 are legal. 1. I still have problem. I save my function return double  value in

On Feb 19, 2009, at 8:26 PM, 任坤 wrote: > hi, Dear Evan Cheng: > > My cpu is i32 embeded CPU. I define pseudo register pair registers. > > In mytargetRegisterInfo.td: > def T0: RegisterWithSubRegs<"t0",[R0,R1]>; > ... > def GPR64 : RegisterClass<"mytarget", [i64], 64, [T0, T1.....] > > In mytargetISelLowering.cpp: > I define i1, i8 ,

I try to define a register class def GPR64 : RegisterClass<"mytarget", [i64], 64, [T0, T1.....] to simulate even/odd pair of GPR32 register. Actually, I just use GPR64 as a temporary register. My CPU just support i32 Integer type directly. I use FDR to save f64. def FDR : RegisterClass<"mytarget", [f64], 64,[FD0, FD1, ....] When I move f64 to even/odd pair register, I

I have a SIP trunk from my Asterisk server to an Avaya CM server. If I place calls inbound, everything works fine. If I place calls outbound, originating from the Asterisk box, everything works fine (I have done this with the use of the .call files). If I setup an extension with the findme-followme feature and have it try to hair-pin a call back out the same trunk to the Avaya, I get a