similar to: [LLVMdev] logic function optimization: IAR 1 - LLVM 0 ?

Have you tried armv7? -bw On Feb 2, 2013, at 3:50 PM, matic at nimp.co.uk wrote: > I gave the following function to IAR compiler (targeting CortexM0) and to clang/LLVM 3.2 (clang -O3 -target thumbv6-eabi -emit-llvm) > > int calleeSave8(int in[]){ > int out=0; > int i; > for(i=0;i<8;i++){ > out ^= in[i] & in[(i+1)%8]; > }//expand to out =

Hi, clang -O3 -target thumbv7-eabi -emit-llvm ... llc ... -debug -O3 -code-model=small -march=thumb -mcpu=cortex-m3 ... Does generate slightly better code, but it still computes 7 xor + 7 and. Anyway this should be a target independent optimization isn't it ?? Cheers Sebastien On 2013-02-04 16:46, Bill Wendling wrote: > Have you tried armv7? > > -bw > > On Feb 2,

What about benchmarks on other Arm devices? On 02/26/2013 02:52 PM, Jim Grosbach wrote: > Cortex-M0 is a Thumb1 only device. There hasn't been any concerted > effort to tune LLVM's Thumb1 output in quite a long time. Even back then > (2008 or so), the effort was mainly to get it to work acceptably, with > the real performance tuning work being done for Thumb2. I'm not >

Hi, I didn't do any serious benchmarking but so far I never found a case where LLVM does better than IAR on CortexM0, but I saw a lot of cases where IAR output is better than LLVM... That said I did not use -Os or -Oz, I just used -O3. A recurrent situation is that LLVM push/pop one or two extra registers compared to IAR, I guess it does so in order to comply with a standard ABI or

Cortex-M0 is a Thumb1 only device. There hasn't been any concerted effort to tune LLVM's Thumb1 output in quite a long time. Even back then (2008 or so), the effort was mainly to get it to work acceptably, with the real performance tuning work being done for Thumb2. I'm not surprised that an embedded market focussed compiler like IAR is better tuned for a chip like that. -Jim On Feb

I've not run any on non-iOS devices, and haven't looked at GCC since v4.2.1 due to licensing issues, so I don't have a good feel for comparative benchmarking. -Jim On Feb 26, 2013, at 4:20 PM, Reed Kotler <rkotler at mips.com> wrote: > What about benchmarks on other Arm devices? > > On 02/26/2013 02:52 PM, Jim Grosbach wrote: >> Cortex-M0 is a Thumb1 only

I haven't tried using -Os/z on any ARM device for the last 3 years, and back then, -Os would break many things. People normally care about code size on Cortex-R/M and ARM9 or older, and in there, not many LLVM users. --renato On 27 February 2013 00:38, Jim Grosbach <grosbach at apple.com> wrote: > I've not run any on non-iOS devices, and haven't looked at GCC since >

Hai, This is amar. I have a situation like installing IAR compiler on Fedora 8 so i installed compiler with the help of wine 1.2. It successfully installed :) but i got a problem during build the programs it is asking the Dongle key(USB) Drivers.This Dongle key is Licensed key provided by IAR vendor. These Drivers are not installed during Installation process. so I add USB patch to wine1.2

In fact, on my shelf is running speex using Raisonance Primer2 DK and IAR STM32-SK DK. But I want to save the power consumption of the device runnig speex, and EFM32 seems to be a very good candidate. Also, do yo think that the STM32F103 (Cortex M3 90 MIPS) could be used to run Speex at 4 Kbps in real time? Regards, Nicolas 2010/3/3 Jean-Marc Valin <jean-marc.valin at usherbrooke.ca> >

The question is, what should C and C++ compilers do with this code? volatile int x; void foo (void) { x; } This question is not totally stupid: embedded systems use code like this when reading a hardware register has a useful side effect (usually clearing the register). It is reasonably clear that a C compiler should load from x and throw away the value. clang and llvm-gcc do

Hi there. I'm having a problem letting a Samba server (MYSAMBA) authenticate users (using "security = domain" and a "password server = MYPDC") against a Windows 2000 PDC (MYPDC). The Windows 2000 machine seems (I'm not 100% sure about this) to be configured to restrict anonymous and it seems to me that this is where the problem lies but don't know what to do. I

Thanks ! On this forum is also shown this information : http://lists.xiph.org/pipermail/speex-dev/2009-January/007050.html According to vk's results, it could be possible to run Speex at 4/6 & 8 kbps on a Cortex M-3 at 36 MHz ... so not excluding the EFM32 ... Nico 2010/3/3 Pietro Maggi <studiomaggi at gmail.com> > On ST forums there is someone that states it has done an

Hi, I would like to execute a MachineFunctionPass after all other passes which modify the machine code. In other words, if we call llc to generate assembly file, that pass should run right before the "Assembly Printer" pass. Is there any official way to enforce this ? Best regards, Sebastien

Hi, I want to use LLVM to compile a ARM-CortexM0 project on windows. But LLVM can't output ELF file on windows. An assert was thrown from LLVM. What can I do now? Thanks! Steven.Q -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140512/bbba49ea/attachment.html>

Hi all, I'm rappedly moving away from windows, but one of the last programs i need to run in windows is 'IAR Embedded Workbench (Kickstart Version)' I've tried to run it some time ago (i think about 2 months back) in wine, but it didn't work so well back then. I haven't tried it with newer versions since then. I need that program so i can program my msp430

Hello, I'm sorry if this is not the correct place to ask this question but what I'm looking for is any data on the reality of Speex working on an ARM7 core? I'm looking at doing a few diffrent projects where I will be using a proc such as the LPC2378 with the ARM7TDMI-S core running at 72Mhz (although errata show only 60Mhz is currenlty possible). Do you know if there is a port

Hi, I am confused about the call to isPhyRegUsed in calculateCalleeSavedRegisters: if (Fn.getRegInfo().isPhysRegUsed(Reg)) { // If the reg is modified, save it! CSI.push_back(CalleeSavedInfo(Reg)); } It seems that isPhyRegUsed returns true if the register is read or written in the function. If this is right, why do we save a register if it is only read in the function ?? I would have

Hello all, For the past couple of months I've been writing a new llvm backend for Renesas RL78 MCU: https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rl78.html The software manual which contains all there is to know about RL78 is available here: https://www.renesas.com/us/en/doc/products/mpumcu/doc/rl78/r01us0015ej0220_rl78.pdf The motivation behind this is the

Hi, Do you think that Speex could run in real time on the new EFM32 ultra-low consumption Cortex-M3 MCU (180 ?A/MHz) (NB 8KHz - Quality 4 - complexity 1 / same as STM32F103 Speex lib.) ? Its max speed is 32 MHz (about 40 MIPs). Thanks. Regards, Nicolas -------------- next part -------------- An HTML attachment was scrubbed... URL:

Greetings. A friend of mine and I are thinking about implementing the SIQ Protocol, describe as RFC here: http://www.milter.info/milter-siq/draft-irtf-asrg-iar-howe-siq-00.txt as an Apache Module. This would implement the HTTP "connector?? described in the RFC. While we do not think that this is too complicated, we are concerned about the whole process that is attached to building the