Displaying 20 results from an estimated 2000 matches similar to: "[LLVMdev] Documentation of fmuladd intrinsic"
2013 Jan 14
0
[LLVMdev] Documentation of fmuladd intrinsic
Thanks for all the replies - it pretty much confirmed what I think I'd
worked out about how fmuladd is supposed to behave.
But my initial query wasn't asking what fmuladd did - it was asking for
the documentation about it to be clarified. Can I suggest that the
Overview section for fmuladd is changed to say the following (the key
point being the removal of the word "legal" in
2013 Jan 11
3
[LLVMdev] Documentation of fmuladd intrinsic
On Fri, Jan 11, 2013 at 1:08 PM, Andrew Booker <andrew.booker at arm.com>wrote:
> The fmuladd intrinsic is described as saying that a multiply and
> addition sequence can be fused into an fma instruction "if the code
> generator determines that the fused expression would be legal and
> efficient". (http://llvm.org/docs/LangRef.html#llvm-fma-intrinsic)
>
>
2013 Jan 11
0
[LLVMdev] Documentation of fmuladd intrinsic
----- Original Message -----
> From: "Cameron McInally" <cameron.mcinally at nyu.edu>
> To: "Andrew Booker" <andrew.booker at arm.com>
> Cc: llvmdev at cs.uiuc.edu
> Sent: Friday, January 11, 2013 12:37:07 PM
> Subject: Re: [LLVMdev] Documentation of fmuladd intrinsic
>
>
> On Fri, Jan 11, 2013 at 1:08 PM, Andrew Booker <
>
2013 Jan 11
3
[LLVMdev] Documentation of fmuladd intrinsic
Out of curiosity, what is the use-case for isFMAFasterThanMulAndAdd? If a
target declares that FMA is actually slower for a given type, why not just
declare it as illegal for that type? Wouldn't that accomplish the same
thing without another target hook? I feel like I'm missing something here.
On Fri, Jan 11, 2013 at 2:40 PM, Hal Finkel <hfinkel at anl.gov> wrote:
> -----
2014 Oct 16
3
[LLVMdev] Segfault on AArch64 LNT
Hi,
Have you guys seen this?
http://lab.llvm.org:8011/builders/clang-aarch64-lnt/builds/1522
There are a lot of commits in there, and I'm far away from ARM64
hardware for a few days, so if one of you guys could have a look, it'd
be great. :)
cheers,
--renato
2014 Dec 29
2
[RFC][FFT][Fixed-Point][NEON] NEON-Optimize
Hi Timothy,
It requires some extra effort if twiddles and input/output have different bit width. Since Opus uses int32 for twiddles, we are going to do the same thing.
Thanks,
Phil Wang
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2013 Sep 10
2
[LLVMdev] Address Space Casting
Hello to everybody,
I am writing this mail to inform you about a patch that will be committed soon
(respect to current reviews).
Here the link to the first mail in llvm-commits:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20130812/184422.html
This patch introduces a new IR instruction named 'addrspacecast' that will be
used to represent the casting operation between
2014 Sep 24
4
[LLVMdev] Support for Soft-float
Hi,
I'm trying to generate some SPARCv8 assembly for a sparc target that
doesn't have an FPU. I'm unable to get the flow to generate calls to a
soft-float library. Since I wasn't able to find a definitive answer, I was
hoping someone might be able to offer some pointers or shed some light.
Running "clang -c -emit-llvm -msoft-float test.c -o test.bc" doesn't
generate
2013 Jan 11
1
[LLVMdev] Documentation of fmuladd intrinsic
Hal Finkel <hfinkel at anl.gov> writes:
> There are a few conditions that contribute to the decision of whether
> or not to make the fmuladd -> fma translation. The relevant code is in
> CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:
>
> case Intrinsic::fmuladd: {
> EVT VT = TLI.getValueType(I.getType());
> if (TM.Options.AllowFPOpFusion !=
2013 Sep 10
0
[LLVMdev] Address Space Casting
Hi,
| This patch introduces a new IR instruction named 'addrspacecast' that will be
| used to represent the casting operation between pointers of different address
| spaces. This instruction will represent whatever kind of conversion (potentially
| both value and size of the pointer) and the semantic of the conversion between a
| pair of address spaces is target specific.
Assuming I
2014 Mar 31
5
[LLVMdev] Contributing the Apple ARM64 compiler backend
Hi,
Apart from whether fast-isel should be enabled or disabled (I think enabled, personally), I haven't heard any dissenting voices about how to attack the merge problem yet.
Tim, am I correct in saying that you believe AArch64 -> ARM64 is the right way to go?
Does anyone disagree with that approach?
Cheers,
James
________________________________________
From: llvmdev-bounces at
2013 Jan 11
2
[LLVMdev] Documentation of fmuladd intrinsic
----- Original Message -----
> From: dag at cray.com
> To: "Justin Holewinski" <justin.holewinski at gmail.com>
> Cc: "Hal Finkel" <hfinkel at anl.gov>, "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>
> Sent: Friday, January 11, 2013 2:13:50 PM
> Subject: Re: [LLVMdev] Documentation of fmuladd intrinsic
>
> Justin
2013 Jan 11
1
[LLVMdev] Documentation of fmuladd intrinsic
----- Original Message -----
> From: "Justin Holewinski" <justin.holewinski at gmail.com>
> To: "Hal Finkel" <hfinkel at anl.gov>
> Cc: "David A. Greene" <dag at cray.com>, "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>
> Sent: Friday, January 11, 2013 2:19:01 PM
> Subject: Re: [LLVMdev] Documentation of
2015 May 11
1
opus Digest, Vol 76, Issue 11
Hi Jean-Marc,
Thanks for pointing us the way.
Yes it is a overflowing problem. I moved all scaling code in the front of any other operations, and test_unit_mdct passes for all sizes.
I will update Ne10 right after Vish double checks it on hardware. He will repost patches with more verification later this week.
Regards,
Phil Wang
Well, I see three questions that need to be answered at this point
2013 Jan 11
0
[LLVMdev] Documentation of fmuladd intrinsic
On Fri, Jan 11, 2013 at 3:16 PM, Hal Finkel <hfinkel at anl.gov> wrote:
> ----- Original Message -----
> > From: dag at cray.com
> > To: "Justin Holewinski" <justin.holewinski at gmail.com>
> > Cc: "Hal Finkel" <hfinkel at anl.gov>, "LLVM Developers Mailing List" <
> llvmdev at cs.uiuc.edu>
> > Sent: Friday,
2014 Dec 24
6
[RFC][FFT][Fixed-Point][NEON] NEON-Optimize Fixed-Point FFT?
Hi,
I am working on DSP module of Ne10. I see there are fixed-point and floating-point FFT inside Opus. Is fixed-point FFT only a fall back for CPU without VFP? On ARMv7-A and ARMv8-A, benchmark result shows that fixed-point (int32) and floating-point (float32) FFT have similar performance. I guess fixed-point version is not often used on these platforms. Is it worth the effort to NEON-optimize
2014 Dec 18
1
[ARM][FFT][NEON] Integrate Ne10 into Opus?
Hi Ralph,
I have pushed patches to enable radix 3 and radix 5. Github: https://github.com/projectNe10/Ne10/releases/tag/v1.2.0
Best Regards,
Phil Wang
> Date: Thu, 11 Dec 2014 10:46:50 -0800
> From: Ralph Giles <giles at thaumas.net>
> Subject: Re: [opus] [ARM][FFT][NEON] Integrate Ne10 into Opus?
> To: opus at xiph.org
> Message-ID: <5489E69A.5000305 at thaumas.net>
2015 Jan 19
1
[RFC][FFT][Fixed-Point][NEON] NEON-Optimize
Hi Jean-Marc,
I have implemented fixed-point FFT with 32-bit twiddles. Now I want to
evaluate the accuracy, what method does Opus use?
I use function implemented inside Ne10 to calculate SNR. Any comment?
| size | SNR (dB) |
| 16 | 82.558587 |
| 32 | 83.530298 |
| 60 | 80.292433 |
| 64 | 82.752950 |
| 120 | 79.625077 |
| 128 | 83.091260 |
| 240 | 79.555263 |
| 256 |
2015 Jan 27
3
fixed point version for celt_pitch_xcorr on aarch64
Hi, all,
Does Opus need celt_pitch_xcorr' s fixed point version for ARM aarch64 architecture? If yes, which version does Opus prefer: assembly or instrinsics?
Thanks,
Zhongwei
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2014 Dec 25
2
[RFC][FFT][Fixed-Point][NEON] NEON-Optimize Fixed-Point FFT?
Jean-Marc Valin wrote:
> There is definitely some use for a Neon fixed-point FFT. How much
> exactly I'm not sure. Fixed-point is a bit more than just a fall-back
Well, we use fixed-point mode by default in Firefox for both Firefox OS
and Fennec (Firefox on Android). The reason is that, although there is
some NEON-class hardware where float does finally appear to be a little
bit