similar to: [LLVMdev] running a single test of "make check"

Displaying 20 results from an estimated 10000 matches similar to: "[LLVMdev] running a single test of "make check""

2013 Jan 12
0
[LLVMdev] running a single test of "make check"
`llvm-lit path/to/test/file/here` Joey On 12 January 2013 12:08, Reed Kotler <rkotler at mips.com> wrote: > Is there a way to just run one test with "make check" for either the llvm > or clang test suites? > > Tia. > > Reed > ______________________________**_________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu
2014 Feb 25
3
[LLVMdev] configure with clang vs gcc
On 02/25/2014 02:38 PM, Eric Christopher wrote: > On Tue, Feb 25, 2014 at 2:32 PM, reed kotler <rkotler at mips.com> wrote: >> On 02/25/2014 09:30 AM, Richard Sandiford wrote: >>> reed kotler <rkotler at mips.com> writes: >>>> On 02/24/2014 04:42 PM, Eric Christopher wrote: >>>>> On Mon, Feb 24, 2014 at 4:40 PM, reed kotler <rkotler at
2014 Feb 25
2
[LLVMdev] configure with clang vs gcc
I see what my problem is here.... I'll continue to move further. Seems like Richards fix is still okay. On 02/25/2014 02:42 PM, Eric Christopher wrote: > On Tue, Feb 25, 2014 at 2:41 PM, reed kotler <rkotler at mips.com> wrote: >> On 02/25/2014 02:38 PM, Eric Christopher wrote: >>> On Tue, Feb 25, 2014 at 2:32 PM, reed kotler <rkotler at mips.com> wrote:
2014 Feb 25
3
[LLVMdev] configure with clang vs gcc
On 02/24/2014 04:42 PM, Eric Christopher wrote: > On Mon, Feb 24, 2014 at 4:40 PM, reed kotler <rkotler at mips.com> wrote: >> I need to leave soon and will take a look in the morning. >> >> I did look at the autoconf input files configure.ac >> >> There is a disable-zlib but not a disable-valgrind, even though it seems >> like there used to be.
2015 Feb 04
6
[LLVMdev] llvm builtins
In the following example with gcc style builtins, in once case llvm.powi.f64 is emitted and in the other just a call to library function powf. ~/llvm/build/Debug+Asserts/bin/clang -S -emit-llvm pow1.c Why is that? Is there a way to force the call to an llvm style builtin? Tia. Reed -------------- next part -------------- A non-text attachment was scrubbed... Name: pow1.c Type: text/x-csrc
2014 Feb 25
2
[LLVMdev] configure with clang vs gcc
On 02/25/2014 09:30 AM, Richard Sandiford wrote: > reed kotler <rkotler at mips.com> writes: >> On 02/24/2014 04:42 PM, Eric Christopher wrote: >>> On Mon, Feb 24, 2014 at 4:40 PM, reed kotler <rkotler at mips.com> wrote: >>>> I need to leave soon and will take a look in the morning. >>>> >>>> I did look at the autoconf input files
2014 Sep 30
2
[LLVMdev] ptrtoint
If you can't make an executable test from C or C++ code then how do you know something works. Just by examination of the .s? On 09/30/2014 03:18 PM, Reed Kotler wrote: > If I wanted to call this function that they generated by hand, from C or > C+ code, how would that be done? > > if have seen cases where a real boolean gets generated but it was > something fairly involved.
2012 Jun 05
4
[LLVMdev] technical debt
On 06/04/2012 05:17 PM, Daniel Berlin wrote: > Can we get back to the substantive discussion about your ideas for > lessening the technical debt? The lessening requires enlisting people that are willing to do this as opposed to doing fun science like cool optimization. I,for example, find the documentaiton, cleanup and refactoring to be interesting so I don't feel cheated to work on
2014 Jun 11
2
[LLVMdev] constraining two virtual registers to be the same physical register
On 06/10/2014 05:51 PM, Pete Cooper wrote: > Hi Reed > > You can do this on the instruction itself by telling it 2 operands > must be the same register. For example, from X86: > > let Constraints = "$src1 = $dst" in > defm INSERTPS : SS41I_insertf32<0x21, "insertps">; > > Thanks, Hi Pete, Sorry. I should have been more specific. I'm
2012 Jun 05
3
[LLVMdev] technical debt
Well, differences of opinion is what makes horse races. Reed On 06/04/2012 04:57 PM, Daniel Berlin wrote: > On Mon, Jun 4, 2012 at 7:53 PM, reed kotler<rkotler at mips.com> wrote: >> On 06/04/2012 03:25 PM, Daniel Berlin wrote: >>> I'm pretty sure neither llvm nor clang have any technical debt at all. >>> >>> On Mon, Jun 4, 2012 at 5:18 PM, reed
2014 Jan 29
6
[LLVMdev] making emitInlineAsm protected
I would like to make the following member of AsmPrinter be protected void EmitInlineAsm(StringRef Str, const MDNode *LocMDNode = 0, InlineAsm::AsmDialect AsmDialect = InlineAsm::AD_ATT) const; I have some stubs that I want to emit in MipsAsmParser . Are there any objections to doing this? Reed
2012 Jun 05
0
[LLVMdev] technical debt
FWIW, I'm putting together (hopefully to be done by the end of this weekend) a substantial refactoring of the TableGen backend API along with shiny new documentation (reStructuredText with sphinx) of all of TableGen, including documentation about how to write backends and---depending on how adventurous I get---a more detailed coverage of the syntax. Also, Reed, in your TableGen talk, IIRC,
2012 Jun 28
2
[LLVMdev] recursing llvm
Okay. Cool. So do you bootrstrap and verify as part of the usual testing? Do the nightly scripts do this? Reed On 06/28/2012 11:08 AM, Eric Christopher wrote: > On Jun 27, 2012, at 10:48 PM, Reed Kotler<rkotler at mips.com> wrote: > >> On 06/27/2012 05:00 PM, Eric Christopher wrote: >>> On Jun 19, 2012, at 5:24 PM, reed kotler<rkotler at mips.com> wrote:
2013 Feb 14
5
[LLVMdev] changing opcode
Is there a simple way to just change the opcode of a machine instruction. I have a lot of long/short pairs where when I know the offset, i can replace the long version with the short version. Tia. REed
2013 Mar 22
4
[LLVMdev] proposed change to class BasicTTI
Just realized that BasicTransformInfoClass is an immutable pass. Not sure how to reconcile this with fact that there will be different answers needed depending on the subtarget. Seems like BasicTansformInfoClass should become a function pass that does not modify anything. On 03/22/2013 09:43 AM, Reed Kotler wrote: > Another way to do this would to be to have a reset virtual function >
2013 Sep 18
2
[LLVMdev] forcing two instructions to be together
I used the A9 schedule as an example: http://llvm.org/svn/llvm-project/llvm/trunk/lib/Target/ARM/ARMScheduleA9.td The documentation could use more clarity, but this is how I was able to do it to always get two specific instructions to be scheduled together. ________________________________________ From: reed kotler [rkotler at mips.com] Sent: Tuesday, September 17, 2013 8:54 PM To: Micah Villmow
2012 Jun 05
2
[LLVMdev] technical debt
Hi Sean, Glad to hear there is clean up of tablegen going on. Just for the record, I don't know what you are referring to regarding some comment of mine at my talk about 10K LOC. I don't know how big tablegen is itself nor how much code has been written in it so I would not have ventured such a guess. The idea of totally replacing the tablegen language came up at the talk during the
2013 Sep 17
2
[LLVMdev] forcing two instructions to be together
Reed, Couldn't you also use instruction scheduling classes and specify that the second instruction has a bypass from the first instruction? The scheduler should always schedule them together in that case. Micah > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On > Behalf Of reed kotler > Sent: Tuesday, September 17, 2013
2015 Mar 19
2
[LLVMdev] Final added to parser<bool>
One could argue that mclinker is doing something good or not by how it's using this class but I don't see the need for parser<bool> to be final. That is a subjective opinion that mclinker needs to be changed. I think that "final" was added to some of these command line classes to avoid some kind of clang warning. That seems wrong to me that the tools are dictating
2014 Aug 31
2
[LLVMdev] lowering and non legal types in fast-isel
I understand that but falling back makes the compilation slower. I'm wondering what could be done to remove this restriction about fast-isel not being able to handle non legal types. ________________________________________ From: Anton Korobeynikov [anton at korobeynikov.info] Sent: Sunday, August 31, 2014 12:55 AM To: Reed Kotler Cc: LLVMdev at cs.uiuc.edu Subject: Re: [LLVMdev] lowering