similar to: [LLVMdev] attributes

On 01/09/2013 01:19 PM, Sean Silva wrote: > On Wed, Jan 9, 2013 at 4:14 PM, reed kotler <rkotler at mips.com> wrote: >> Does anyone know offhand where this gets added to clang and where the hook >> for processing >> in llc is? >> >> I think that this code has changed recently. > There's

On 01/09/2013 02:44 PM, Eli Friedman wrote: > On Wed, Jan 9, 2013 at 2:19 PM, reed kotler <rkotler at mips.com> wrote: >> On 01/09/2013 01:19 PM, Sean Silva wrote: >>> On Wed, Jan 9, 2013 at 4:14 PM, reed kotler <rkotler at mips.com> wrote: >>>> Does anyone know offhand where this gets added to clang and where the >>>> hook >>>> for

On Wed, Jan 9, 2013 at 2:19 PM, reed kotler <rkotler at mips.com> wrote: > On 01/09/2013 01:19 PM, Sean Silva wrote: >> >> On Wed, Jan 9, 2013 at 4:14 PM, reed kotler <rkotler at mips.com> wrote: >>> >>> Does anyone know offhand where this gets added to clang and where the >>> hook >>> for processing >>> in llc is?

On Wed, Jan 9, 2013 at 4:14 PM, reed kotler <rkotler at mips.com> wrote: > Does anyone know offhand where this gets added to clang and where the hook > for processing > in llc is? > > I think that this code has changed recently. There's <http://clang.llvm.org/docs/InternalsManual.html#how-to-add-an-attribute>. If that's not up to date please let me know. --

Yes, you could have mips16 and fastcc. Mips16 just means that processor mode to execute that function is "mips16". So in a mips16 designated function, I will just emit mips16 instructions and in a "nomips16" function, just emit normal mips32 instructions. I tend to call this "mips32" normal mode, "standard encoding" because in reality the processor is

I think that Bill Wendlings new attribute implementation would allow me to do this but it is not ready yet. Maybe it's okay to just add them to the list of function attributes as I suggested. But in the end, someone has to approve the checkin. On 01/11/2013 07:35 AM, Reed Kotler wrote: > Yes, you could have mips16 and fastcc. > > Mips16 just means that processor mode to execute

On 03/13/2013 03:44 PM, Bill Wendling wrote: > Author: void > Date: Wed Mar 13 17:44:19 2013 > New Revision: 176991 > > URL: http://llvm.org/viewvc/llvm-project?rev=176991&view=rev > Log: > Really fix the MIPS test. > > Modified: > cfe/trunk/test/CodeGen/mips16-attr.c > > Modified: cfe/trunk/test/CodeGen/mips16-attr.c > URL:

For target dependent function level attributes, do I need to actually add them to the enumeration in attributes.h? I have for example, mips16 and nomips16 as attributes. Or is this supposed to be done with cc <n>

Depends on whether its actually the calling convention, or just an annotation (I don't know MIPS that well). Could you ever have a case where you want to declare a function as both mips16 and fastcc, or some other explicit calling convention? For PTX, we added two calling conventions to mark kernel functions (callable by host) from device functions (not callable by host). But this

On 05/14/2012 02:42 PM, Jakob Stoklund Olesen wrote: > On May 14, 2012, at 2:28 PM, reed kotler wrote: > >> I'm not using getMinimalPhysRegClass. Some target independent code is using it. > Probably PEI. > >> It makes trouble for us and I would like to submit a patch to make it a virtual function so that I can override it and make it meaningful for Mips, as long as this

Reed, On May 14, 2012, at 3:45 PM, reed kotler <rkotler at mips.com> wrote: > On 05/14/2012 02:42 PM, Jakob Stoklund Olesen wrote: >> On May 14, 2012, at 2:28 PM, reed kotler wrote: >> >>> I'm not using getMinimalPhysRegClass. Some target independent code is using it. >> Probably PEI. >> >>> It makes trouble for us and I would like to

On May 14, 2012, at 2:28 PM, reed kotler wrote: > I'm not using getMinimalPhysRegClass. Some target independent code is using it. Probably PEI. > It makes trouble for us and I would like to submit a patch to make it a virtual function so that I can override it and make it meaningful for Mips, as long as this method still exists. > > I want to add another register class for

On 05/14/2012 02:17 PM, Jakob Stoklund Olesen wrote: > On May 14, 2012, at 1:02 PM, reed kotler wrote: > >> Does anyone understand the purpose of : >> >> TargetRegisterInfo::getMinimalPhysRegClass ??? > Barely. > >> Why is there the presumption to use the minimal subclass? > The function can be traced back to a time when men were men and registers belonged to

So I have dual mode 16/32 compilation on a per function basis working. I need to clean up some things and then will push the change. I managed to do everything without needing to change anything in target independent code thus far. It was a fun puzzle to solve as to how to do this using only the given APIs. As for the BasicTransformInfoPassass, for this dual mode I'm using

On 03/28/2013 12:22 PM, Nadav Rotem wrote: > Hi Reed, > > On Mar 28, 2013, at 12:18 PM, Reed Kotler <rkotler at mips.com > <mailto:rkotler at mips.com>> wrote: > >> As for the BasicTransformInfoPassass, for this dual mode I'm using >> createNoTargetTransformInfoPass right now. > > So, MIPS does not need LSR, LowerSwitch and other optimizations

I'm rewriting this patch for the stubs to not use outputing of raw text. Generating the instructions is very straightforward and that part is done. I'm translating the actual function now. How do you emit an .ent or .globl from asm printer? .type ? .end ?? .section ??? I'm studying the classes now but it should be simple to do so if you know, you can save me some time because this

I added one method which clears the list of register classes. Then there is a change to mips16 code which simulates switching from mips32 to mips16 mode in the same module. It seems to work fine in that I can run this version of llvm for mips16 and it works identical to the one without this code. Beyond the "make check" I have run test-suite against this version. We could just

Good day. I am posting the follow-up to the -hackers and CC'ing to the -security, because some more-or-less nasty points were found. Sat, Feb 23, 2008 at 10:32:02PM +0300, Eygene Ryabinkin wrote: > But there is another concern with bzero(): it is well-known function. > Especially for compilers. And it is bad: some arrays inside g_eli, > that hold decryption keys are the local

This came about in trying to implement some stubs used by gcc mips16 for allowing floating point interoperability with mips32. You get the following looking code from gcc -mips16: # Stub function for foovf (float) .section .mips16.fn.foovf,"ax", at progbits .align 2 .set nomips16 .set nomicromips .ent __fn_stub_foovf .type __fn_stub_foovf, @function __fn_stub_foovf: la

On 01/28/2014 06:29 PM, Eric Christopher wrote: > Uhhhh... > > -eric > > On Tue, Jan 28, 2014 at 4:56 PM, reed kotler <rkotler at mips.com> wrote: >> I would like to make the following member of AsmPrinter be protected >> >> >> void EmitInlineAsm(StringRef Str, const MDNode *LocMDNode = 0, >> InlineAsm::AsmDialect