similar to: [LLVMdev] Possible bug in DFAPacketizer::ReadTable

Displaying 20 results from an estimated 600 matches similar to: "[LLVMdev] Possible bug in DFAPacketizer::ReadTable"

2012 Dec 10
2
[LLVMdev] Possible bug in DFAPacketizer::ReadTable
Hi Anshu, no, I did not fill a bug report. It is not so easy to make the code fail noticeably; during Hexagon CodeGen tests it happens silently and tests pass. I am working on another VLIW backend which uses DFAPacketizer and compiling llvm with gcc-4.4 makes it segfault, but with gcc-4.7 the bug gets hidden again (it still happens, but values after DFAStateEntryTable in memory are such that
2012 Dec 10
0
[LLVMdev] Possible bug in DFAPacketizer::ReadTable
Hi Carlos, Thanks for identifying the bug. I'll confirm and fix. Is there a bug report open for this? -Anshu --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation On 12/10/2012 4:48 AM, Carlos Sánchez de La Lama wrote: > Hi all, > > I have found what I think it is a bug in DFAPacketizer::ReadTable. > > When finding
2012 Dec 10
0
[LLVMdev] Possible bug in DFAPacketizer::ReadTable
Carlos, I committed a fix in r169783. Thanks for catching this. However, I could not reproduce an invalid read or a segfault even with fadd.ll. Is there a test case you can check in that reproduces this bug? Even if the segfault occurs intermittently, that's better than no test case at all. Thanks -Anshu --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by
2012 Dec 11
2
[LLVMdev] Possible bug in DFAPacketizer::ReadTable
Hi Anshu, I got a testbench which fails (and segfaults) consistently with an environment (gcc + os) conveniently preserved in a virtual machine. I will confirm that it is gone there and report. Thanks for the fix :) Carlos 2012/12/10 Anshuman Dasgupta <adasgupt at codeaurora.org> > Carlos, > > I committed a fix in r169783. Thanks for catching this. > > However, I could
2012 Dec 11
0
[LLVMdev] Possible bug in DFAPacketizer::ReadTable
Hi again, I can confirm r169783 fixes the problem. My testbench segfaulted in r169782 but works after your commit. We can close the issue. Thanks, Carlos 2012/12/11 Carlos Sánchez de La Lama <csanchezdll at gmail.com> > Hi Anshu, > > I got a testbench which fails (and segfaults) consistently with an > environment (gcc + os) conveniently preserved in a virtual machine. I
2012 Dec 13
0
[LLVMdev] Possible bug in DFAPacketizer::ReadTable
Hi Anshu, the "test case" I referred to requires the compilation of our whole back-end. It segdaults when using gcc-4.4.3 under Ubuntu 10.04, with other combinations I have tested it still happens (before your patch) but is not noticeable unless using gdb. I have tried making valgrind catch it but no success... so I guess the only way to *see* it is using the debugger. I remember
2012 Dec 11
2
[LLVMdev] Possible bug in DFAPacketizer::ReadTable
Great! Can you please check in that test case or better still, a reduced version of that test. Thanks -Anshu --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation On 12/11/2012 5:47 AM, Carlos Sánchez de La Lama wrote: > Hi again, > > I can confirm r169783 fixes the problem. My testbench segfaulted in > r169782 but works after your
2012 Jun 12
2
[LLVMdev] DFAPacketizer with StateTrans != 0 Assertion
Hi, I'm trying to get the DFAPacketizer to work for my target but with any instruction I get the 'Assertion `CachedTable.count(StateTrans) != 0' failed' error and it crashes out before packeting a single instruction. I have a *GenDFAPacketizer.inc file and my packetizer pass checks that the table is not empty before proceeding. I also have a schedule file with my functional
2015 Nov 16
2
DFAPacketizer assert failure
For some reason on my VLIW target DFAPacketizer fails at assert(CachedTable.count(StateTrans) != 0); in the following function: // reserveResources - Reserve the resources occupied by a MCInstrDesc and // change the current state to reflect that change. void DFAPacketizer::reserveResources(const llvm::MCInstrDesc *MID) { unsigned InsnClass = MID->getSchedClass(); const llvm::InstrStage
2013 Feb 11
2
[LLVMdev] DFAPacketizer
Jonas, At this point, the DFA packetizer models a simple VLIW architecture and does not accommodate multiple stages. That's the reason for the behavior you're seeing. -Anshu --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation *From:*llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] *On Behalf Of *Jonas
2012 Jun 12
0
[LLVMdev] DFAPacketizer with StateTrans != 0 Assertion
Hi Sam, On 12/06/2012 15:33, sam wrote: > Hi, > > I'm trying to get the DFAPacketizer to work for my target but with any > instruction I get the > 'Assertion `CachedTable.count(StateTrans) != 0' failed' error and it crashes > out before packeting a single instruction. Do you reserve some resource without verification? Note that reserveResources() should be
2013 Feb 12
2
[LLVMdev] DFAPacketizer
Hi Jonas, > It is interesting to find this in the ARM backend, considering your answer. The ARM backend doesn't use the DFA packetizer. It's only used by Hexagon. At this point, there is no plan to address thisin the DFA packetizer since none of the supported targets needthe functionality. Thanks -Anshu --- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
2013 Feb 12
0
[LLVMdev] DFAPacketizer
Hi, I looked a bit through the mail archives, and found this question answered in Oct 2011 (see below). It is interesting to find this in the ARM backend, considering your answer. Can you give more information about for example is this a temporary deficiency in the DFAPacketizer? What is the IIC_iMOVi itinerary doing below? Thanks, Jonas Thu Oct 6 15:11:25 CDT 2011: Hello Hal. > Is there
2012 Jun 12
3
[LLVMdev] DFAPacketizer with StateTrans != 0 Assertion
Hi Ivan, The assertion was happening because I wasn't checking after the first attempt failed. The first packet was failing and so it was ended, and then the packetizer attempted to add it to the next packet without checking for available resources. However this highlights probably the real problem - my packetizer is unable to find resources for the first instruction, or any of my
2013 Feb 18
0
[LLVMdev] DFAPacketizer
Hi Anshu, Would there be any interest in extending this algorithm to handling more extensive models, such as VLIW scheduling based on FU's and bundle space... ie handle multiple stages ? I might do it and commit, if there is acceptance and guidance... Jonas ________________________________ From: Anshuman Dasgupta [mailto:adasgupt at codeaurora.org] Sent: Tuesday, February 12, 2013 4:47 PM
2019 Mar 26
2
[PATCH 1/2] readtable: add hook for type conversions per column
You need admin assistance, someone will probably see your request here and fulfill it. It might be helpful to read this question/answer on StackOverflow discussing the context of proposing patches to base R functionality ... https://stackoverflow.com/questions/8065835/proposing-feature-requests-to-the-r-core-team cheers Ben Bolker On 2019-03-26 4:20 p.m., Kurt Van Dijck wrote: > On
2012 Jun 18
2
[LLVMdev] [llvm-commits] [PATCH] Refactoring the DFA generator
Hi Anshu, Thanks for reviewing this. I added a top comment for AddInsnClass and I fixed the violation of column numbers. On 15/06/2012 21:31, Anshuman Dasgupta wrote: > Hi Ivan, > > The patch looks good to me. I have a couple of minor comments: > > +void State::AddInsnClass(unsigned InsnClass, > Add a top level comment describing the function > > + std::map<State*,
2012 Jun 25
2
[LLVMdev] [llvm-commits] [PATCH] Refactoring the DFA generator
Hi Anshu, Just in case you have forgotten this thread ;-). Is this patch ok to commit or does it not apply to trunk properly ? I can fix it if that's the problem. Ivan On 20/06/2012 19:33, Anshuman Dasgupta wrote: > > > Thanks for reviewing this. I added a top comment for AddInsnClass > and I fixed the violation of column numbers. > > Great. Looks good to me. > >
2012 Jun 15
0
[LLVMdev] [llvm-commits] [PATCH] Refactoring the DFA generator
Hi Ivan, The patch looks good to me. I have a couple of minor comments: +void State::AddInsnClass(unsigned InsnClass, Add a top level comment describing the function + std::map<State*, std::set<Transition*, ltTransition>, ltState> stateTransitions; You should be able to use SmallSet here. Also, this line exceeds 80 columns. On a related note, is the CachedTable mechanism in
2019 Mar 27
3
[RFC] readtable enhancement
This has some nice properties: 1) It self-documents the input expectations in a similar manner to colClasses. 2) The implementation could eventually "push down" the coercion, e.g., calling it on each chunk of an iterative read operation. The implementation needs work though, and I'm not convinced that coercion failures should fallback gracefully to the default. Feature requests