Displaying 20 results from an estimated 3000 matches similar to: "[LLVMdev] ARM assembly"
2009 Feb 17
4
joining "one-to-many"
Hello list,
I am wondering if a joining "one-to-many" can be done a little bit easier. I tried merge function but I was not able to do it, so I end up using for and if.
Suppose you have a table with locations, each location repeated several times, and some attributes at that location. The second table has the same locations, but only once with a different set of attributes. I would
2012 Dec 09
0
[LLVMdev] ARM assembly
Sound like you are not enabling optimization. Try with -O3.
Evan
On Dec 9, 2012, at 12:49 AM, Amir Yazdanbakhsh <amir.yazdanbakhsh at gmail.com> wrote:
> Hi All,
>
> I am working to cross compile (just generate assembly code) a simple C code in ARM. First, I use CLANG to get LLVM bytecode, then I use llc to generate assembly for ARM. The problem is it never uses any other
2012 Dec 08
2
[LLVMdev] Compile code for arm
OK. Thanks for your help.
My problem is I am playing with the size of registerfile in ARM. I thought
I can do it with only modifying the Target in the LLVM directory. But if it
is going to use gcc-toolchain, then I need to modify them as well which is
a huge work!
Best Regards,
A. Yazdanbakhsh
2012 Dec 08
2
[LLVMdev] Compile code for arm
Thanks for your help. But I got this warning which it seems it doesn't use
-triple
"clang: warning: argument unused during compilation: '-triple
arm-none-eabi' "
Best Regards,
A. Yazdanbakhsh
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
PhD. Student
School of
2012 Dec 08
0
[LLVMdev] Compile code for arm
Ok, These are the three options you should be playing with:
-ccc-host-triple $(CCC_HOST_TRIPLE_ARM) \
--sysroot=$(SYSROOT_ARM) \
-gcc-toolchain $(GCC_TOOLCHAIN)
Where the (sic) host triple defines the "target" triple too.
Sysroot and gcc-toolchain is where you'll find the libraries and
binutils for the ARM targets (you'll need them, since LLVM still can't
cross-compile on
2012 Dec 08
1
[LLVMdev] Compile code for arm
Thanks Tim.
I just need the assembly file. Anyway, I still have problem with generating
assembly for the ARM without having any thumb and other fancy instructions.
Best Regards,
A. Yazdanbakhsh
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
PhD. Student
School of Electrical and Computer
2012 Dec 08
4
[LLVMdev] Compile code for arm
Hi,
I've installed clang version 3.3 on ubuntu.
I want to cross-compile a C code into ARM (preferably) ARMv7. I want to get
both assembly code and binary. Can anyone help me what are the steps which
should I take?
Second question, Is there anyway to tell compiler not to use any
Thumb/NEON/VFP instructions?
Thanks
Best Regards,
A. Yazdanbakhsh
2008 Apr 22
3
[PATCH 0/3] ia64/pv_ops preparation
Hi. This patchset is preparation patches for ia64/pv_ops support.
They are almost trivial and mainly make kernel paravirtualization friendly.
thanks,
Diffstat:
arch/ia64/kernel/irq_ia64.c | 1 -
include/asm-ia64/intrinsics.h | 11 +++++++++++
include/asm-ia64/mmu_context.h | 6 +-----
include/asm-ia64/smp.h | 2 ++
include/asm-ia64/system.h | 10 ++++++++--
5 files
2012 Dec 08
0
[LLVMdev] Compile code for arm
Hi Amir,
On Dec 8, 2012 8:13 PM, "Amir Yazdanbakhsh" <amir.yazdanbakhsh at gmail.com>
wrote:
> My problem is I am playing with the size of registerfile in ARM. I
thought I can do it with only modifying the Target in the LLVM directory.
But if it is going to use gcc-toolchain, then I need to modify them as well
which is a huge work!
That sort of depends how you modify it. If
2012 Dec 08
0
[LLVMdev] Compile code for arm
On 8 December 2012 19:10, Amir Yazdanbakhsh <amir.yazdanbakhsh at gmail.com> wrote:
> Hi,
>
> I've installed clang version 3.3 on ubuntu.
> I want to cross-compile a C code into ARM (preferably) ARMv7. I want to get
> both assembly code and binary. Can anyone help me what are the steps which
> should I take?
clang -triple arm-none-eabi (or many other variations
2009 Jun 08
1
Looking for easy way to normalize data by groups
Hi,
i do have a dataframe representing data from a repeated experiment. PID
is a subject identifier, Time are timepoints in an experiment which was
repeated twice. For each subject and all three timepoints there are 2
sets of four values.
df <- data.frame(PID = c(rep("A", 12), rep("B", 12), rep("C", 12)),
Time = rep(c(0, 0, 0, 0, 30, 30, 30,
2007 Dec 06
3
Setting Multiple Values via func_odbc ...?
I need to insert/update multiple MySQL columns in a single row with the func_odbc function at the SAME TIME.
Someone showed me how to use ARRAY to retrieve multiple values at the same time, but I need to SET multiple values.
Can this be done?
If not, I will just stick with MySQL, but that's a pain in the ass because the asterisk-addons package has no default rpm spec file for building an
2011 Mar 10
1
How to use conditional statement
Dear R helpers
Suppose
val1 = c(10, 20, 35, 80, 12)
val2 = c(3, 8, 11, 7)
I want to select either val1 or val2 depending on value of third quantity val3.
val3 assumes either of the values "Monthly" or "Yearly".
If val3 = "Monthly", then val = val1 and if val3 = "Yearly", then val = val2.
I tried the ifelse statement as
ifelse(val3 =
2008 Feb 28
7
[PATCH 0/5] RFC: ia64/pv_ops: ia64 intrinsics paravirtualization
Hi. Thank you for comments on asm code paravirtualization.
Its direction is getting clear. Although it hasn't been finished yet,
I'd like to start discussion on ia64 intrinsics paravirtualization.
This patch set is just for discussion so that it is a subset of
xen Linux/ia64 domU paravirtualization, not self complete.
You can get the full patched tree by typing
git clone
2008 Feb 28
7
[PATCH 0/5] RFC: ia64/pv_ops: ia64 intrinsics paravirtualization
Hi. Thank you for comments on asm code paravirtualization.
Its direction is getting clear. Although it hasn't been finished yet,
I'd like to start discussion on ia64 intrinsics paravirtualization.
This patch set is just for discussion so that it is a subset of
xen Linux/ia64 domU paravirtualization, not self complete.
You can get the full patched tree by typing
git clone
2012 Dec 06
2
[LLVMdev] Increase the number of registers in ARM
Hi,
I want to increase the number of integer registers in the ARM machine.
I don't have any idea how/where I can start. Can anybody help me?
By the way, what are the following line in the ARMRegisterInfo.td specify:
def qsub_0
def qsub_1
....
Thanks
Best Regards,
A. Yazdanbakhsh
2007 Jun 30
1
Importing an Excel file that has merged cells
Dear all,
I have a problem with importing an excel file into R. I can open the
file easily (either saving it as a CSV or using RODBC). But the
original file is using merged cell in its first column, which gives
the name of the observation. (I am dealing with repeated measurements
for the same observation)
So when I open the dataframe in R it looks like this
Col1 Col2 Col3
name1 val1 val2
2012 Apr 26
6
print table on plot
Hello,
I would like to be able to plot an array on a plot, something like:
|arg1 | arg2 | arg3
val1| 0.9 | 1.1 | 2.4
val2| 0.33 | 0.23 | -1.4
val3| hello| stop | test
I know Rwave is good to report but don't want to use it.
? Is there a package that allow quick and dirty plot of dataframes like this
?
Thanks a lot
--
View this message in context:
2012 Dec 10
0
[LLVMdev] ARM assembly
I used your code and it works fine. Once I increase the number of variable
it uses the extra registers which I added. I have another problem.
To generate the assembly file for new ARM machine with extra registers,I
follow these steps:
1) clang -emit-llvm main.ll main.c
2) llc -march=arm -o main.s main.bc
In this case it doesn't use the registers which I added to the
architecture. Do you
2002 Mar 12
1
Change axes labels in Lattice
Hello
I'm making a levelplot with frequencies in a 2*2 table with ordered factors. I get the plot I want, but axes draw the levels of the factor (1,2,3,4..) instead of
the desired labels.
Is there a way to alter this axes labels in lattice graphics?
Thanks for the reply
Oscar
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