similar to: [LLVMdev] RFC: I'm interested in filling the code-owner role for the following...

On Nov 14, 2012, at 7:08 PM, Chandler Carruth <chandlerc at google.com> wrote: > Config > ADT > Support[1] > CMake > "library layering"[2] > > Inlining (including cost and other related passes) > SROA / mem2reg (and other related passes) Makes sense to me! > [1]: Regarding Support: I talked to Michael Spencer about this. I'm > offering to own

2012/11/16 Chris Lattner <clattner at apple.com>: > On Nov 14, 2012, at 7:08 PM, Chandler Carruth <chandlerc at google.com> wrote: >> Config >> ADT >> Support[1] >> CMake >> "library layering"[2] >> >> Inlining (including cost and other related passes) >> SROA / mem2reg (and other related passes) > > Makes sense to me!

On Nov 15, 2012, at 6:32 PM, NAKAMURA Takumi <geek4civic at gmail.com> wrote: >> Sounds fine. I still want someone on the hook for being the overall owner. So long as your willing to be the one to cross check with them, I'm ok with any contributor who is competent in an area to do the actual review. > > I rather suggest "the small committee" model for it by a few

Chris Lattner <clattner at apple.com> writes: > The problem with having >1 person as a code owner for a component, is > that it is quite possible that each will assume that someone else is > looking at a patch. No one knows what patches are being watched, etc. Isn't this an indication that some kind of formalized process (i.e. a patch queue) is desirable?

I would like to get feedback from the community on how I can speed up the compilation of a function that has one huge basic block consisting of over 150K instructions. It takes about 10 minutes for clang to produce the object file and the function that is taking up the majority of the time is LoadAndStorePromoter::run, which is called when SROA is run: // Otherwise, we have mixed loads and

On Wed, Mar 1, 2017 at 12:53 PM, John Criswell via llvm-dev < llvm-dev at lists.llvm.org> wrote: > On 3/1/17 2:54 PM, Peizhao Ou via llvm-dev wrote: > > Hi everyone, > > I am currently testing out a combination of IR->IR passes with opt to > benchmark how they affect performance. The source code works fine if simply > use the clang (-O0/-O3) to directly compile to

Hi everyone, I am currently testing out a combination of IR->IR passes with opt to benchmark how they affect performance. The source code works fine if simply use the clang (-O0/-O3) to directly compile to object files and link them. However, when I use opt with a select set of passes and then use llc to compile them to binary, the compiled binary is wrong. That makes me wonder if there are

On Thu, May 15, 2014 at 9:31 AM, Philip Reames <listmail at philipreames.com>wrote: > On 05/14/2014 06:02 PM, Akira Hatanaka wrote: > > I would like to get feedback from the community on how I can speed up > the compilation of a function that has one huge basic block consisting of > over 150K instructions. It takes about 10 minutes for clang to produce the > object file

(and sys::cas_flag that STATISTIC uses is a uint32 ...) On Thu, Aug 25, 2016 at 9:54 AM, Daniel Berlin <dberlin at dberlin.org> wrote: > Okay, dumb question: > Are you really getting negative numbers in the second column? > > 526,766 -136 mem2reg # PHI nodes inserted > > http://llvm.org/docs/doxygen/html/PromoteMemoryToRegister_8cpp_source.html >

On May 20, 2008, at 8:57 AM, David Greene wrote: > On Tuesday 20 May 2008 07:03, Nicolas Capens wrote: > >> 1) Does ScalarReplAggregates totally superscede >> PromoteMemoryToRegister? I > > Nope, they are different. Mem2Reg is really important if you want > register > allocation. Actually SROA does fully subsume Mem2Reg. It iterates between breaking up

I did gathered aggregate statistics reported by “-stats” over the ~400 test files. The following table summarizes the impact. The first column is the sum where the new analysis is enabled, the second column is the delta from baseline where no CFL alias analysis is performed. I am not experienced enough to know which of these are “good” or “bad” indicators. —david 72,250 685 SLP

The ivdep pragma is designed to do exactly what the name states - ignore vector dependencies.  Cray Research first implemented this in 1978 in their CFT compiler, and has supported it since. This pragma is typically used by application developers who want vectorized code when the compiler cannot automatically determine safety; it is not equivalent to the OpenMP SIMD pragma in that the compiler is

Hi, I'm trying to autotune a good sequence of IR optimization passes and I seem to run into segfaults in opt (in LLVM5) with certain pass orderings. Is this expected behavior? If so, what would be the recommended way of determining pass dependencies so that I can encode them into the tuner? The test program can be found here: https://gist.github.com/kavon/92d153cdd54ce9b77162af3af47d4c95

Hi, Thanks for getting back to me. I'd like to understand if it possible to avoid instructions that relies on memory address and instead have all the necessary data inside registers. I think this would simplify a lot analysis on the LLVM IR.. Thanks again On Wed, Mar 6, 2019, 18:23 Vedant Kumar <vsk at apple.com> wrote: > Hi, > > Could you share some more details about what

Hi all, I am trying to see how single llvm optimizations work by running them one by one with opt and looking how the IR changes.Since I was interested in seeing how constant propagation was working I tried to run opt on the Sparse Conditional Constant Propagation, however by passing as argument -S -sccp -die it does not change anything in the output IR code. I attached the file with the source

Hi all, I am trying to understand the effectiveness of various llvm optimisations when a language targets llvm (or C) as its backend. The following is my approach (please correct me if I did anything wrong): I am trying to explicitly control the optimisations passes in llvm. I disable optimisation in clang, but instead emit unoptimized llvm IR, and use opt to optimise that. These are what I

Is there some kind of guide to the various optimization passes? I see their names in the class list, and the various "createXXX" functions, but I'm not sure if there are ordering requirements or perhaps unsafe optimizations. -- edA-qa mort-ora-y -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Sign: Please digitally sign your emails. Encrypt: I'm also

This compiler does not have mem-SSA, as far as I know, only few pass can propagate value along memory. You need to promote those local variable into register first before sccp is invoked. e.g1. opt a.ll -basicaa -gvn -sccp -S eg.2. opt a.ll -sroa -sccp -S On 4/16/13 12:37 PM, Niko Zarzani wrote: > Hi all, > > I am trying to see how single llvm optimizations work by running them

On Tue, May 20, 2008 at 2:28 PM, Chris Lattner <clattner at apple.com> wrote: > > On May 20, 2008, at 8:57 AM, David Greene wrote: > >> On Tuesday 20 May 2008 07:03, Nicolas Capens wrote: >> >>> 1) Does ScalarReplAggregates totally superscede >>> PromoteMemoryToRegister? I >> >> Nope, they are different. Mem2Reg is really important if you

Have -O0 on your clang command line causes all functions to get marked with an 'optnone' attribute that prevents opt from being able to optimize them later. You should also add "-Xclang -disable-O0-optnone" to your command line. ~Craig On Thu, Sep 21, 2017 at 10:04 PM, Yi Lin via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi all, > > I am trying to