similar to: [LLVMdev] Is this a missed (simple) optimization?

Hi, If the function was called Test(&B) then the first store would affect the second load. Tim. On Fri, Nov 16, 2012 at 11:58 AM, AnonW <wayne.phillips at gmail.com> wrote: > I think this is a missed optimization, but maybe I'm missing some significant > piece of knowledge(!) as to why this might not be optimizable :) Test > case... > > int A; // some global

Hi! I am trying to get the loop vectorizer to work on a simple example (http://pastebin.com/tGhpc4y0) that doubles every element in a vector. I've found that 'opt -loop-vectorize -force-vector-width=4 -S -debug double.ll' works as expected. However, removing the -force-vector-width flag results in no vectorization. From the debug output I can see that the issue boils down to: LV: The

On 11/11/2015 9:36 AM, Hal Finkel wrote: > ----- Original Message ----- >> From: "Krzysztof Parzyszek" <kparzysz at codeaurora.org> >> >> Yeah, the remark about devices I made in my post was a result of a >> "last-minute" thought to add some rationale. It doesn't actually >> apply >> to SROA, since there are no devices that are

On 07/13/2012 04:30 PM, Duncan Sands wrote: > Hi, > >> I found the -postdomfrontier pass in *llvm*.org/docs/Passes.html, but >> 'opt' does not accept it. I could not find the relevant codes in >> PostDominance.cpp in SVN trunk, but I found some relevant codes here >> http://opensource.apple.com/source/clang/clang-137/src/lib/Analysis/PostDominators.cpp.

Hi Mark, This will workaround the problem of "default" branch restriction on the switch instruction. The trouble with this technique is that it will trump later optimization phases such as constant propagation. When a block was part of a case, because of the knowledge of the case value, the block was a candidate for better optimization. However, when we move the body of the case into

Hi, I'm trying to get the DFAPacketizer to work for my target but with any instruction I get the 'Assertion `CachedTable.count(StateTrans) != 0' failed' error and it crashes out before packeting a single instruction. I have a *GenDFAPacketizer.inc file and my packetizer pass checks that the table is not empty before proceeding. I also have a schedule file with my functional

Hi Chen, llvm-gcc is dead. Try dragonegg [] or clang [2]. [1] http://dragonegg.llvm.org/ [2] http://clang.llvm.org/ Regards, chenwj -- Wei-Ren Chen (陳韋任) Computer Systems Lab, Institute of Information Science, Academia Sinica, Taiwan (R.O.C.) Tel:886-2-2788-3799 #1667 Homepage: http://people.cs.nctu.edu.tw/~chenwj

hello guys: i am thinking about what kind of C instructions can turn into llvm IR 'select' instruction. i tried "d=a?b:c" and compiled it using clang, i still didn't get 'select' is there anybody who knows this? thank you -- View this message in context: http://llvm.1065342.n5.nabble.com/llvm-select-instruction-tp56719.html Sent from the LLVM - Dev mailing list

Hi Ivan, The assertion was happening because I wasn't checking after the first attempt failed. The first packet was failing and so it was ended, and then the packetizer attempted to add it to the next packet without checking for available resources. However this highlights probably the real problem - my packetizer is unable to find resources for the first instruction, or any of my

Nadav, Please forgive my ignorance, but 'opt -mcpu=corei7 -loop-vectorize -S -debug double.ll' doesn't appear to make a difference. In fact it seems to be ignored as garbage values for -mcpu don't raise an error. Am I overlooking something else also? Many Thanks, Josh On Thu, May 9, 2013 at 6:06 PM, Nadav Rotem <nrotem at apple.com> wrote: > Hi Josh, > > Your

Hi, I try to understand why llvm can't optimize this small piece of code. My expectation is that the IR will be optimized to a " ret i64 2101545. But somehow the alias analysis fails when the pointer is casted to an integer value, so the dead code eliminator can't optimize it away. Could someone explain to me why this is failing and if there is a solution for that ? I can trick the

Hi everyone, Recently I tried to compile llvm-gcc-4.2-2.9 on a 64bit ubuntu12.04 machine. And I was using the settings below, export C_INCLUDE_PATH=/usr/include/x86_64-linux-gnu export LIBRARY_PATH=/usr/lib/x86_64-linux-gnu ../llvm-gcc-4.2-2.9.source/configure --enable-optimized --program-prefix=llvm- --enable-checking --enable-llvm=${HOME}/moonbox/llvm-obj/Debug+Asserts

Hi Sam, On 12/06/2012 15:33, sam wrote: > Hi, > > I'm trying to get the DFAPacketizer to work for my target but with any > instruction I get the > 'Assertion `CachedTable.count(StateTrans) != 0' failed' error and it crashes > out before packeting a single instruction. Do you reserve some resource without verification? Note that reserveResources() should be

Hi, When using llvm-ld to link .bc files(compiled with llvm-gcc with option --emit-llvm), I went into error like: file not recognized: File format not recognized. I was confused because llvm-ld is the LLVM linker to link llvm bitcode files together, then why this error occurred? I am using llvm 2.9 and the corresponding binary version of llvm-gcc. It will be appreciated if anyone of you can

I have a loop fully unrolled and got the following store instruction. store i32 %add.3, i32* getelementptr inbounds ([20 x [20 x i32]]* @c, i32 0, i32 0, i32 0), align 4 I want to know exactly which element of the array that is going to be stored, which help me to transform the high level language to hardware. Take the instruction above as an example, I know the data is stored into c[0][0]. It

Hi Eric,  I was considering machine instructions to get scope information. And variable declaration does not correspond to machine instruction, hence the problem i.e. no scope associated with it. If 'i' is initialized in the 'if-scope' then we get 'variable i' mapped to correct scope as corresponding machine instruction is generated for this. This is not a problem as we

Well, I tried the command line given by you and I get the following error clang++ nbody.kernel.cu -Xclang -fcuda-is-device -I/home/upitamba/llvm-3.2.src/tools/clang/test/SemaCUDA/ -Xclang -triple -Xclang nvptx64 -Xclang -target-cpu -Xclang sm_10 -S fatal error: error in backend: Cannot select: 0x334a870: v4f32 = NVPTXISD::MoveParam 0x334a770 [ORD=1] [ID=22] 0x334a770: v4f32 =

hi, with LLVM 3.1, i am trying to compile toy.cpp from http://llvm.org/docs/tutorial/LangImpl7.html#code. i got the following error: $ clang++ -g toy.cpp `llvm-config --cppflags --ldflags --libs core jit native` -O3 -o toy toy.cpp:4:10: fatal error: 'llvm/IRBuilder.h' file not found #include "llvm/IRBuilder.h" i fixed this by modifying the broken line to: #include

Hi shadowkernel, > I searched the archives and found > http://llvm.1065342.n5.nabble.com/post-dominance-frontier-fix-td10221.html > http://llvm.1065342.n5.nabble.com/Is-there-a-control-dependence-graph-builder-td35919.html#a35921 > http://llvm.1065342.n5.nabble.com/post-dominance-frontier-td6783.html > > It seems none of them are relevant. Could you give me more hints about

Hi Josh, Your modules does not have a triple, so the target machine and TargetTransformInfo have no way of knowing if you are running on a machine with vector registers. Try adding the '-mcpu=XXXX' to opt and see what happens. Thanks, Nadav On May 9, 2013, at 1:42 PM, Josh Klontz <josh.klontz at gmail.com> wrote: > Hi! I am trying to get the loop vectorizer to work on a