similar to: [LLVMdev] adding support for -ffixed-<reg>

Displaying 20 results from an estimated 2000 matches similar to: "[LLVMdev] adding support for -ffixed-<reg>"

2012 Oct 03
0
[LLVMdev] adding support for -ffixed-<reg>
On Oct 2, 2012, at 7:23 AM, Matthew Curtis <mcurtis at codeaurora.org> wrote: > I'm adding support for -ffixed-<reg> for Hexagon and was wondering if I should do it in such a way that other targets get the support as well by default or if a given target back-end should have to explicitly opt-in for support. It would be great to have this as a target-indepentent (well, obviously
2012 Oct 03
2
[LLVMdev] adding support for -ffixed-<reg>
Hi Chris, > From the design perspective, I think it would make sense to represent this in > LLVM IR with named metadata (http://llvm.org/docs/LangRef.html# > namedmetadatastructure) like "!llvm.fixedregs". This could then be picked up > by the code generator, installed as preallocated registers (Jakob would be the > one to ask how best to do this). -ffixed-<reg>
2012 Oct 03
0
[LLVMdev] adding support for -ffixed-<reg>
On Oct 3, 2012, at 12:13 AM, 陳韋任 (Wei-Ren Chen) <chenwj at iis.sinica.edu.tw> wrote: > Hi Chris, > >> From the design perspective, I think it would make sense to represent this in >> LLVM IR with named metadata (http://llvm.org/docs/LangRef.html# >> namedmetadatastructure) like "!llvm.fixedregs". This could then be picked up >> by the code
2012 Oct 02
0
[LLVMdev] adding support for -ffixed-<reg>
On Tue, Oct 02, 2012 at 09:23:27AM -0500, Matthew Curtis wrote: > I'm adding support for -ffixed-<reg> for Hexagon and was wondering if I should > do it in such a way that other targets get the support as well by default or if > a given target back-end should have to explicitly opt-in for support. What "-ffixed-<reg>" does? Regards, chenwj -- Wei-Ren Chen
2012 Oct 02
2
[LLVMdev] adding support for -ffixed-<reg>
On 10/2/2012 9:36 AM, 陳韋任 (Wei-Ren Chen) wrote: > On Tue, Oct 02, 2012 at 09:23:27AM -0500, Matthew Curtis wrote: >> I'm adding support for -ffixed-<reg> for Hexagon and was wondering if I should >> do it in such a way that other targets get the support as well by default or if >> a given target back-end should have to explicitly opt-in for support. > What
2012 Oct 02
0
[LLVMdev] adding support for -ffixed-<reg>
> From the GCC manual (http://gcc.gnu.org/onlinedocs/gcc-4.7.2/gcc/ > Code-Gen-Options.html#index-ffixed-2267) > > -ffixed-reg > > Treat the register named reg as a fixed register; generated code should > never refer to it (except perhaps as a stack pointer, frame pointer or in > some other fixed role). > > reg must be the name of a register. The
2011 Jan 21
1
[LLVMdev] -ffixed option in llvm-gcc
Hi I am trying to register shadow a global variable using -ffixed option in llvm-gcc. I am able to accomplish this using gcc however llvm-gcc seems to ignore this option and generate code using the register. command line: >gcc -Wall -m64 -O3 -pthread -ftls-model=initial-exec -ffixed-r12 test.c -o test >objdump -d ./test | grep r12 >llvm-gcc -Wall -m64 -O3 -pthread
2019 Jan 04
2
[RFC] Allocatable Global Register Variables for ARM
Thank you for your reply Eli, I too was working with Carey on this feature, so please let me reply. On 12/21/18 8:05 PM, Friedman, Eli via llvm-dev wrote: > As a side-note, you might want to check that prologue/epilogue emission won't emit a PUSH/POP that refers to a register reserved this way; we sometimes add an "extra" register to align the stack. Yes, you are right.
2008 Oct 31
3
[LLVMdev] gfortran link failure in current llvm svn
On Oct 30, 2008, at 11:02 PM, Chris Lattner wrote: > On Oct 30, 2008, at 5:23 PM, Jack Howarth wrote: >> ps We do have one oddity left in llvm-gfortran from current llvm >> svn. I find everytime I compile something with llvm-gfortran that >> I get a series of warning messages... >> >> f951: warning: command line option "-Wformat" is valid for C/C++/
2018 Dec 21
2
[RFC] Allocatable Global Register Variables for ARM
Hi all, This is a RFC on support for Global Register Variables in the Arm backend. Whilst there has been some prior discussion about whether or not LLVM should (or even needs to) support global register variables, today there seems to be a good measure of support for this in both Clang+LLVM (although it is currently limited to SP). When most of this support landed there was some concern
2012 Dec 20
2
[LLVMdev] [PATCH] Teaching ScalarEvolution to handle IV=add(zext(trunc(IV)), Step)
Ok, so I think I've mis-represented what's really happening. Ignore my previous statements concerning %add :) Again, given: 05: for.body: ; preds = %entry, %for.body 06: %j.04 = phi i32 [ 0, %entry ], [ %inc, %for.body ] 07: %result.03 = phi i32 [ 0, %entry ], [ %add, %for.body ] 08: %conv2 = and i32 %result.03, 255 09: %add = add nsw
2012 Dec 18
2
[LLVMdev] [PATCH] Teaching ScalarEvolution to handle IV=add(zext(trunc(IV)), Step)
Dan, Thanks for the response ... On 12/17/2012 1:53 PM, Dan Gohman wrote: > On Mon, Dec 10, 2012 at 2:13 PM, Matthew Curtis <mcurtis at codeaurora.org> wrote: >> Hello all, >> >> I wanted to get some feedback on this patch for ScalarEvolution. >> >> It addresses a performance problem I am seeing for simple benchmark. >> >> Starting with this C
2012 Sep 10
3
[LLVMdev] teaching FileCheck to handle variations in order
On 9/7/2012 4:08 PM, Chandler Carruth wrote: > On Fri, Sep 7, 2012 at 8:20 AM, Matthew Curtis <mcurtis at codeaurora.org > <mailto:mcurtis at codeaurora.org>> wrote: > > Hello all, > > For the hexagon target, we have a couple of tests that are failing > due to variations in the order of checked text. In these cases the > ordering is not directly
2001 Nov 13
3
Alpha compile warning
Getting this warning compiling on an alpha, is it a problem? 2.4.15-pre4 gcc -D__KERNEL__ -I/usr/users/donjr/linux-2.4.15-pre4/include -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fomit-frame-pointer -fno-strict-aliasing -fno-common -pipe -mno-fp-regs -ffixed-8 -mcpu=ev5 -Wa,-mev6 -DEXPORT_SYMTAB -c journal.c journal.c: In function `journal_init_inode': journal.c:758: warning: long long
2012 Dec 18
0
[LLVMdev] [PATCH] Teaching ScalarEvolution to handle IV=add(zext(trunc(IV)), Step)
On Tue, Dec 18, 2012 at 9:56 AM, Matthew Curtis <mcurtis at codeaurora.org> wrote: > > Here's how I'm evaluating the expression (in my head): > > 00: Add(ZeroExtend(Truncate(Minus(AddRec(Start=0,Step=3)[n],3), i8), i32),3) > | > 01: Add(ZeroExtend(Truncate(Minus(AddRec(Start=0,Step=3)[0],3), i8), i32),3) >
2019 May 14
4
Handling of the x18 register in Wine on AArch64
Hi, I'm sending this discussion to both wine-devel and llvm-dev, to try to keep the discussion open for both sides, to try to find a workable compromise. This was preliminarily discussed on llvm-dev already a few weeks ago. One of the major unresolved issues with Wine for AArch64 is how to handle the platform specific register x18. (https://bugs.winehq.org/show_bug.cgi?id=38780) As
2012 Sep 07
0
[LLVMdev] teaching FileCheck to handle variations in order
On Fri, Sep 7, 2012 at 8:20 AM, Matthew Curtis <mcurtis at codeaurora.org>wrote: > Hello all, > > For the hexagon target, we have a couple of tests that are failing due to > variations in the order of checked text. In these cases the ordering is not > directly relevant to the functionality being tested. > > For example: > > ; CHECK: memw(##a) > ; CHECK:
2019 Apr 26
10
Automatically backing up and restoring x18 around function calls on AArch64?
Hi, When using Wine to run Windows ARM64 executables on Linux, there's one major ABI incompatibility between the two; Windows treats the x18 register as the reserved platform register, while it is free to be clobbered anywhere in code on Linux. The Wine code sets up this register before passing control over to the Windows executable code, but whenever the Windows code calls a function
2012 Dec 21
0
[LLVMdev] [PATCH] Teaching ScalarEvolution to handle IV=add(zext(trunc(IV)), Step)
On Thu, Dec 20, 2012 at 8:36 AM, Matthew Curtis <mcurtis at codeaurora.org> wrote: > Ok, so I think I've mis-represented what's really happening. > Ignore my previous statements concerning %add :) > > Again, given: > > 05: for.body: ; preds = %entry, > %for.body > 06: %j.04 = phi i32 [ 0, %entry ], [ %inc, %for.body
2012 Dec 17
0
[LLVMdev] [PATCH] Teaching ScalarEvolution to handle IV=add(zext(trunc(IV)), Step)
On Mon, Dec 10, 2012 at 2:13 PM, Matthew Curtis <mcurtis at codeaurora.org> wrote: > Hello all, > > I wanted to get some feedback on this patch for ScalarEvolution. > > It addresses a performance problem I am seeing for simple benchmark. > > Starting with this C code: > > 01: signed char foo(void) > 02: { > 03: const int count = 8000; > 04: signed char