similar to: [LLVMdev] branch on vector compare?

Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] branch on vector compare?"

2012 Sep 03
0
[LLVMdev] branch on vector compare?
Hi Stephen, > Hi all, llvm newbie here. welcome! > I'm trying to branch based on a vector compare. I've found a slow way (below) > which goes through memory. Is there some idiom I'm missing so that it would use > for instance movmsk for SSE or vcmpgt & cr6 for altivec? I don't think you are missing anything: LLVM IR has no support for horizontal operations like
2009 Dec 01
0
[LLVMdev] Possible bug in ExpandShiftWithUnknownAmountBit
On Mon, Nov 30, 2009 at 7:22 PM, Javier Martinez <javier at jmartinez.org> wrote: > Hello, > > I'm working in adding support for 64-bit integers to my target. I'm using > LLVM to decompose the 64-bit integer operations by using 32-bit registers > wherever possible and emulating support where not. When looking at the bit > shift decomposition I saw what seems to be a
2009 Dec 01
4
[LLVMdev] Possible bug in ExpandShiftWithUnknownAmountBit
Hello, I'm working in adding support for 64-bit integers to my target. I'm using LLVM to decompose the 64-bit integer operations by using 32-bit registers wherever possible and emulating support where not. When looking at the bit shift decomposition I saw what seems to be a bug in the implementation. The affected function is ExpandShiftWithUnknownAmountBit in LegalizeIntegerTypes.cpp.
2012 Sep 03
3
[LLVMdev] branch on vector compare?
> > which goes through memory. Is there some idiom I'm missing so that it would use > > for instance movmsk for SSE or vcmpgt & cr6 for altivec? > > I don't think you are missing anything: LLVM IR has no support for horizontal > operations like or'ing the elements of a vector of boolean together. The code > generators do try to recognize a few idioms and
2017 Dec 13
3
inefficient for loop, is there a better way?
The code below is a small reproducible example of a much larger problem. While the script below works, it is really slow on the true dataset with many more rows and columns. I'm hoping to get the same result to examp, but with significant time savings. The example below is setting up a data.frame for an ensuing regression analysis. The purpose of the script below is to appends columns to
2012 Sep 04
0
[LLVMdev] branch on vector compare?
Am 04.09.2012 00:08, schrieb Stephen: >>> which goes through memory. Is there some idiom I'm missing so that it would > use >>> for instance movmsk for SSE or vcmpgt & cr6 for altivec? >> >> I don't think you are missing anything: LLVM IR has no support for horizontal >> operations like or'ing the elements of a vector of boolean together.
2012 Sep 07
3
error: in catg (xi, name=nam, label=lab): "LO2" has <2 category levels
Dear R-users, During a fit procedure in a Logistic prediction model I encounter the following problem: error: in catg (xi, name=nam, label=lab: X has <2 category levels The following code is used: fit <-lrm(MRI_Diag_RC ~ factor(O4_1r) + N6_1r + leeftijd + LO1 + LO2 + LO3+ LO4+ LO5+ LO6+ LO7+ LO8+ LO9+ LO10+ LO11+ LO12+ LO13 + LO14+ LO15+ LO16+ LO17+ LO18+ LO19+ LO20+ LO21+ LO22+ LO23+
2009 Apr 07
1
use the value of variable to quote certain elements in matrix
Hi, I want to use the value of variable to quote elements in matrix. For example, I have a matrix like:               y1   y2m1         1      2m2         3      4 where y1,y2,m1,m2 are column and row names.  I have two random character variable, say x,  that could be either  y1 or y2  and  y that could be either m1 or m2.  So can I  do like   Matrix[y,x] to quote elements?  I've tried this
2006 May 08
1
ob.step$anova interpretation
hello I built logistic regression model. To model check I used stepAIC. But I don't know how it is interpreted . I could not any find any explanation about it For instance which model is preferable ? What are the critarias to choose beter model I will appreciate if you give me an explanation ? models --------- > lo1.step$anova Stepwise Model Path Analysis of Deviance Table Initial
2006 Jun 13
1
Predict with loess
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2012 Sep 04
2
[LLVMdev] branch on vector compare?
Roland Scheidegger <sroland <at> vmware.com> writes: > This looks quite similar to something I filed a bug on (12312). Michael > Liao submitted fixes for this, so I think > if you change it to > %16 = fcmp ogt <4 x float> %15, %cr > %17 = sext <4 x i1> %16 to <4 x i32> > %18 = bitcast <4 x i32> %17 to i128 > %19 = icmp ne i128 %18, 0
2003 Dec 19
6
Configuring JAIL to bind on lo0 interface
Hello, I have configured jail for users with sshd ftpd and auth. I started this jail on IP 127.0.0.10(there is an alias on lo0 interface), there was not any bigger problem to start it. But i have a problem with internet in this jail. I can log in to this jail through ssh or ftpd but i can't connect to the internet. I try to set up some kind of nat but it doesn't work. Can anybody help me
2010 Jun 01
1
loop
Can any one help it will be very kind, loop statements I have this table and some more records, I want to reshape it V1 V2 V3 V4 V5 V6 V7 V8 V9 V10 TP53 Dis1 Dis2 Dis3 Dis4 Dis5 Dis6 DCI New1 New2 New3 New4 FDI Hi2 H3 H4 GHD I1 I3 I4 I5 I6 I7 I8 I want my new table or matrix to be some thing like this V1 V2 V3 Tp53 Dis1 Dis2 Tp53 Dis1 Dis3 Tp53 Dis1 Dis4 Tp53 Dis1 Dis5 Tp53 Dis1 Dis6 Tp53 Dis2
2013 Feb 15
1
Fitting pareto distribution / plotting observed & fitted dists
Some background: I have some data on structural dependencies in a base of code artifacts. The dependency structure is reflected in terms of relative node degrees, with each node representing some code unit (just as an example). This gives me real data of the following form (sorry for the longish posting): dat1 <- c(0.00245098039215686, 0, 0, 0, 0, 0, 0, 0, 0.0563725490196078, 0, 0, 0,
2012 Sep 05
0
[LLVMdev] branch on vector compare?
Am 05.09.2012 00:24, schrieb Stephen: > Roland Scheidegger <sroland <at> vmware.com> writes: >> This looks quite similar to something I filed a bug on (12312). Michael >> Liao submitted fixes for this, so I think >> if you change it to >> %16 = fcmp ogt <4 x float> %15, %cr >> %17 = sext <4 x i1> %16 to <4 x i32> >> %18 =
2000 Aug 01
0
anova() on three or more objects behaves inconsistently (PR#621)
anova() on three or more objects behaves inconsistently in R. In R anovalist.lm does a sequential ANOVA using pairwise F tests, ignoring all the other objects, so the larger of the two models provides the denominator. In S anova.lmlist uses the denominator from the largest model (smallest residual df) in the set, as does anova.glmlist in both. I suggest that R's anovalist.lm is wrong (that
2009 Jan 08
2
Problems with network in jail
Hi all, Is it mandatory to add device mem to jails to enable network via the gateway? Left ezjail with FreeBSD-6.3 (and a hardware replacement of my server) and am now starting again with FreeBSD-7.1. Early this week, I upgraded from 7.0 to 7.1 (not having 'used' jails on 7.0). After creating the jail with `ezjail-admin update -i` I created a 'ports build' jail `ezjail-admin
2007 Jan 12
2
[LLVMdev] Inserting an assembly instruction in the calling sequence of the powerpc target
Hi all, I'm currently implementing a linux/ppc target in llvm. The abis between Darwin/ppc and linux/ppc are different and I'm running into problems with vararg calls. Before a variadic method is called, an extra instruction must be executed (which is creqv 6, 6, 6). This instruction is not necessary in Darwin/ppc. I looked into the PowerPC target implementation and the code generation
2008 Jan 31
16
Hardware RAID vs. ZFS RAID
Hello, I have a Dell 2950 with a Perc 5/i, two 300GB 15K SAS drives in a RAID0 array. I am considering going to ZFS and I would like to get some feedback about which situation would yield the highest performance: using the Perc 5/i to provide a hardware RAID0 that is presented as a single volume to OpenSolaris, or using the drives separately and creating the RAID0 with OpenSolaris and ZFS? Or
2007 Jan 14
0
[LLVMdev] Inserting an assembly instruction in the calling sequence of the powerpc target
On Fri, 12 Jan 2007, Nicolas Geoffray wrote: > I'm currently implementing a linux/ppc target in llvm. The abis between cool > Darwin/ppc and linux/ppc are different and I'm running into problems > with vararg calls. ok > Before a variadic method is called, an extra instruction must be > executed (which is creqv 6, 6, 6). This instruction is not necessary in >