similar to: [LLVMdev] LoadInst::getAlignment

The compilation error is : `error: ‘LD100’ was not declared in this scope.` On Mon, Jan 28, 2013 at 11:31 AM, Alexandru Ionut Diaconescu < alexandruionutdiaconescu at gmail.com> wrote: > Hello everyone, > > Can you please tell me if it is possible in LLVM to cast a `Value*` to an > `Instruction*/LoadInst*` if for example `isa<LoadInst>(MyValue)` is true? > In my

Hi Alexandru, > The compilation error is : `error: ‘LD100’ was not declared in this scope.` > > On Mon, Jan 28, 2013 at 11:31 AM, Alexandru Ionut Diaconescu < > alexandruionutdiaconescu at gmail.com> wrote: > >> Hello everyone, >> >> Can you please tell me if it is possible in LLVM to cast a `Value*` to an >> `Instruction*/LoadInst*` if for example

Alexandru Ionut Diaconescu wrote: > Hello everyone, > > Can you please tell me if it is possible in LLVM to cast a `Value*` to > an `Instruction*/LoadInst*` if for example `isa<LoadInst>(MyValue)` is > true? http://llvm.org/docs/ProgrammersManual.html#the-isa-cast-and-dyn-cast-templates In my particular piece of code: > > Value* V1 =

Hi, I would like to get the '5'. I would like to know where the loaded value is stored. I don't know which method I should use of the LoadInst class. Hope this clarifies Thanks On Wed, Dec 12, 2018, 20:37 Doerfert, Johannes Rudolf <jdoerfert at anl.gov wrote: > The LoadInst is %5. I'm not sure what you mean by reference though. > > On 12/12, Alberto Barbaro via

Hi, I am trying to figure out the best way to add some extra metadata to the store and load llvm-ir instructions: The metadata content is a 'Value*' expression representing a side channel, containing dependency information that is used to help the Scoped Alias Analysis. Optimizations that don't know about this side channel can safely drop it, where the only effect would be on the

Hello everyone, Can you please tell me if it is possible in LLVM to cast a `Value*` to an `Instruction*/LoadInst*` if for example `isa<LoadInst>(MyValue)` is true? In my particular piece of code: Value* V1 = icmpInstrArray[i]->getOperand(0); Value* V2 = icmpInstrArray[i]->getOperand(1); if (isa<LoadInst>(V1) || isa<LoadInst>(V2)){ ...

Thanks Sean. It clarified my query. Do you have an answer to my other question (in a different mail-chain) listed below Is there a simple way to check if a given instruction operand (represented by Value *) is a virtual register or otherwise? Context: I am creating a ModulePass for pointer Analysis. BR/Nizam From: "Sean Silva" <chisophugis at gmail.com> To: nizam

I'm make silly error (swap arguments in llvm::StroreInst constructor call: llvm::Value* var = genExpr(bb,*varExpr,false); llvm::Value* val = genExpr(bb,*valExpr,true ); llvm::StoreInst* lStore = new llvm::StoreInst(var,val,bb); instead assert(var && var->getType()->getTypeID()==llvm::Type::PointerTyID && "var side isn't pointer type"); llvm::StoreInst*

Hi all, I have %5 = load i32, i32* %3, align 4 LoadInst and I would like to get reference to the destination ( in this case %5 ). How can I do that? Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20181212/1d0bd00c/attachment.html>

Folks, I have a LLVM instruction like the following %0 = load i32** %pp, align 8 I have a LoadInst &inst handle to this instruction. In addition, i could access the pointer being loaded from using the inst.getPointerOperand... However, is there a way to access the handle to the value being loaded? Essentially, i wanted to access the %0 in the statement listed. The end goal is

Hi all, I put a case into llvm and got the following .ll code: ... %r1419_0_0_0_i376 = alloca i32 ; <i32*> [#uses=2] ... %tmp1476_i = lshr i32 %tmp1226_i, 24 ; <i32> [#uses=1] store i32 %tmp1476_i, i32* %r1419_0_0_0_i376, align 4 %tmp1505_i = volatile load i32* %r1419_0_0_0_i376, align 4 ; <i32> [#uses=1] %tmp1542_i = getelementptr [256 x i8]* @Te, i32 0, i32 %tmp1505_i ...

Hi Tim, Assume a store instruction. Store has 2 Operands. I can use the store->getOperand(0) and store->getOperand(1) methods to access these operands in form of Value *. Very likely that the operands are stack variables or formal variables or global variables. It is also possible that these operands are LLVM virtual-registers. Is there a way to determine if a given operand is a

Thanks Joshua and Michael, Just to to clarify, I'm experimenting with the Interpreter class and observing the instructions that are executed by it. Just for becoming more confident with LLVM in general I'd like for each instruction to access to the various parts of it. In this instance I would like to access to the %Name that is shown in the textual representation. When I call

Hi, Thanks, John, I just forgot the multi-thread issue. I'll write my own pass to handle this as for my project, it is just single-thread case. Sheng. Date: Thu, 22 May 2008 09:30:45 -0500 > From: John Criswell <criswell at cs.uiuc.edu> > Subject: Re: [LLVMdev] Eliminate Store-Load pair even the LoadInst is > volatile > To: LLVM Developers Mailing List

Hello, Thank you for your kind attention to my issue and your help. I changed the tool chain and tried again. And there is a little progress but still have some problem. Using --sysroot doesn't make clang use linker(ld) in the cross tool. Most important question is how I can make clang use cross tool linker. Let me show you my experiment and questions below. There are two questions. [Run]

On 8 February 2013 21:42, David Given <dg at cowlark.com> wrote: > The box itself is an Allwinner A10; armv7l. /proc/cpuinfo says it's got > swp half thumb fastmult vfp edsp neon vfpv3. > Yes, it's a Cortex-A8. I've been unable to find any values for CPU which are accepted (it just > says 'unknown target CPU'. I've tried arm, armv7, armv7a, armv7l,

On 08/02/13 14:42, Renato Golin wrote: [...] > Can you paste the result of a "clang -v -mcpu=CPU file.c" on your box? I > want to see what are the arguments and the assembler/linker it's > choosing to use. What CPU are we talking about? The box itself is an Allwinner A10; armv7l. /proc/cpuinfo says it's got swp half thumb fastmult vfp edsp neon vfpv3. I've been

Hi Sorry, the reason I joined the list is for help finding a bug that occurs when libvorbisenc is compiled and run on ARM EABI systems (current Debian, Gentoo, OpenEmbedded etc). The symptom is that oggenc produces shorter ogg files than it should (about 1/2 size) that decode to the correct duration but of total silence. libvorbis/examples/encoder_example does the same on these systems, but

Hi all, Please review this patch. It's fixing PR3232 comment #8. Function bar from 2008-03-24-BitFiled-And-Alloca.c compiles to: %struct.Key = type { { i32, i32 } } ... define i32 @bar(i64 %key_token2) nounwind { entry: %key_token2_addr = alloca i64 ; <i64*> [#uses=2] %retval = alloca i32 ; <i32*> [#uses=2] %iospec =

Hi Evan, > LValue LV = EmitLV(lhs); > bool isVolatile = TREE_THIS_VOLATILE(lhs); > unsigned Alignment = expr_align(exp) / 8 > > It's using the alignment of the expression, rather than the memory > object of LValue. can't you just use expr_align(lhs) instead? > The patch saves the alignment of the memory object in LValue returned > by EmitLV().