similar to: [LLVMdev] How to eliminate PHI nodes on pointer types?

Displaying 12 results from an estimated 12 matches similar to: "[LLVMdev] How to eliminate PHI nodes on pointer types?"

2012 Aug 20
0
[LLVMdev] How to eliminate PHI nodes on pointer types?
Hi Andrew, > Somewhere during optimization PHI nodes on pointer types (including > alloca instructions) are being introduced, and they persist through the > scalar replacement of aggregates pass and others. I can't seem to find > a combination of passes or transformations to get rid of them. Has > anyone had this problem before, and know a transformation to eliminate > it?
2018 Jun 29
2
Cleaning up ‘br i1 false’ cases in CodeGenPrepare
Hi, I have come across a couple of cases where the code generated after CodeGenPrepare pass has "br i1 false .." with both true and false conditions preserved and this propagates further and remains the same in the final assembly code/executable. In CodeGenPrepare::runOnFunction, ConstantFoldTerminator (which handles the br i1 false condition) is called only once and if after the
2014 Nov 11
3
[LLVMdev] supporting SAD in loop vectorizer
----- Original Message ----- > From: "Dibyendu Das" <Dibyendu.Das at amd.com> > To: "Hal Finkel" <hfinkel at anl.gov>, "Renato Golin" <renato.golin at linaro.org> > Cc: llvmdev at cs.uiuc.edu > Sent: Tuesday, November 4, 2014 12:15:12 PM > Subject: RE: [LLVMdev] supporting SAD in loop vectorizer > > Here's the simple SAD
2014 Nov 11
4
[LLVMdev] supporting SAD in loop vectorizer
----- Original Message ----- > From: "James Molloy" <james at jamesmolloy.co.uk> > To: "Hal Finkel" <hfinkel at anl.gov> > Cc: "Dibyendu Das" <Dibyendu.Das at amd.com>, llvmdev at cs.uiuc.edu > Sent: Tuesday, November 11, 2014 8:21:37 AM > Subject: Re: [LLVMdev] supporting SAD in loop vectorizer > > > If you'd like to
2014 Nov 04
3
[LLVMdev] supporting SAD in loop vectorizer
----- Original Message ----- > From: "Renato Golin" <renato.golin at linaro.org> > To: "Dibyendu Das" <Dibyendu.Das at amd.com> > Cc: llvmdev at cs.uiuc.edu > Sent: Tuesday, November 4, 2014 5:23:30 AM > Subject: Re: [LLVMdev] supporting SAD in loop vectorizer > > On 4 November 2014 11:06, Das, Dibyendu <Dibyendu.Das at amd.com> wrote:
2012 Apr 23
0
[LLVMdev] SIV tests in LoopDependence Analysis, Sanjoy's patch
Hi, When I write various test cases and explore how they're handled by the code in LoopDependenceAnalysis::analysePair, I'm surprised. This loop collects pairs of subscripts from the source and destination refs. * // Collect GEP operand pairs (FIXME: use GetGEPOperands from BasicAA), adding* * // trailing zeroes to the smaller GEP, if needed.* * GEPOpdsTy destOpds, srcOpds;* *
2009 Sep 18
0
[LLVMdev] Problems with live-ins and live-outs
Hi, With the MSP430 target I have live-in/live-out problems pointed out by Machine Instruction Verifier with the attached test-case compiled with: clang-cc -triple=msp430-unknown-unknown test-live.c -S -o - -O1 -verify-machineinstrs -debug For example: %R15W is killed in MBB#0: CMP16rr %R14W<kill>, %R15W<kill>, %SRW<imp-def> But %R15 as live-in in MMB#1: if.else: 0xa244c20,
2012 Apr 12
6
[LLVMdev] SIV tests in LoopDependence Analysis, Sanjoy's patch
Hi, Here is a preliminary (monolithic) version you can comment on. This is still buggy, however, and I'll be testing for and fixing bugs over the next few days. I've used your version of the strong siv test. Thanks! -- Sanjoy Das. http://playingwithpointers.com -------------- next part -------------- A non-text attachment was scrubbed... Name: patch.diff Type: application/octet-stream
2012 Dec 25
2
[LLVMdev] [DragonEgg] Strange call to @"\01__isoc99_fscanf"
Dear all, First of all, Merry Christmas! :) While testing a File I/O sample program, I've encountered a link failure due to missing implementation of "\01__isoc99_fscanf" function. I think this function should be named "__isoc99_fscanf" instead. Please see the program code and LLVM IR generated by DragonEgg and clang below. It shows that clang generates
2014 Dec 03
0
[PATCH] Update links.html
Adding some links to links.html --- images/hw/pioneer_c.png | Bin 0 -> 3389 bytes images/hw/tesla.png | Bin 0 -> 6145 bytes links.html | 13 +++++++++++++ 3 files changed, 13 insertions(+) create mode 100644 images/hw/pioneer_c.png create mode 100644 images/hw/tesla.png diff --git a/images/hw/pioneer_c.png b/images/hw/pioneer_c.png new file mode 100644 index
2013 Feb 14
1
[LLVMdev] LiveIntervals analysis problem
Hello everyone, please I need your help. To reproduce my problem I created simple pass for backends (TestPass.cpp in attached files). That pass I call from Mips backend in this way (MipsTargetMachine.cpp): bool MipsPassConfig::addPreRegAlloc() { addPass(createTestPass()); return false; } The problem becomes, when I am trying compile file ldtoa.ll (in attached files). Compiling
2012 Oct 21
2
Questions and a blockpull issue
Coming off of xen environment; still testing with kvm, just a few questions: 1. What is the roadmap for release of qemu-kvm 1.1 and libvirt 0.10.2 for el6, cause I had to compile from upstream to get the latest stuff. 2. Should not virt-manager show the sparsed disk size instead of actual reserved size of a vm? 3. Where is the virsh bash_completion conf.d file from upstream; since el6 rpm