similar to: [LLVMdev] Fall 2012: coop position in AMD Research

Hi Ben, Thanks that helped a lot. The problem seems to be that with the move to C++11 we now have: void std::vector<_Ty>::push_back(std::pair<_Ty1,_Ty2> &&)' and there no conversion operator that can be applied to convert: 'std::pair<_Ty1,_Ty2>' to 'std::pair<_Ty3,_Ty4> && Where: [ _Ty1=void *,

On 09.08.2012, at 19:43, "Gaster, Benedict" <Benedict.Gaster at amd.com> wrote: > I’m probably missing something simple here but in: > > CGDebugInfo.h: > > std::vector<std::pair<void *, llvm::WeakVH> >ReplaceMap; > > but then in > > CGDebugInfo.cpp: > > llvm::DIType TC = getTypeOrNull(Ty); > > void * v =

I'm probably missing something simple here but in: CGDebugInfo.h: std::vector<std::pair<void *, llvm::WeakVH> >ReplaceMap; but then in CGDebugInfo.cpp: llvm::DIType TC = getTypeOrNull(Ty); void * v = Ty.getAsOpaquePtr(); std::pair<void *, llvm::WeakVH> tmp = std::make_pair(v, TC); if (TC.Verify() && TC.isForwardDecl())

Hi Eli, Sorry about that Visual Studio seems to have inserted tabs and I used an internal diff tool. Anyway, I synced TOT LLVM and made the changes with Emacs and the svn diff is attached. Regards, Ben -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Eli Friedman Sent: Tuesday, June 16, 2009 11:19 AM To: LLVM Developers

On Fri, Sep 4, 2009 at 9:37 AM, Gaster, Benedict<Benedict.Gaster at amd.com> wrote: > The following code causes opt to not terminate! Please flle in bugzilla with a bitcode testcase; it would help to reduce the testcase using bugpoint. -Eli

On Mon, Jun 15, 2009 at 11:21 PM, Gaster, Benedict<Benedict.Gaster at amd.com> wrote: > I can get this two work with additional changes to X86InstrInfocpp but > the problem I have with this approach is that it introduces a lot of > duplication, when all I really want to do is parameterize the final > field in the string "shl{b}\t{%cl, $dst|$dst, %CL}". I was wondering

On Tue, Jun 16, 2009 at 9:39 AM, Gaster, Benedict<Benedict.Gaster at amd.com> wrote: > Hi Eli, > > Yep I was being stupid. > > Please find attached a patch for initial changes to get MASM working. Patch looks fine except that it has tabs (LLVM uses only spaces for indentation). Also, can you generate the patch using "svn diff"? It's currently in some unusual

On Thu, Aug 14, 2008 at 2:55 PM, Benedict Gaster <benedict.gaster at amd.com> wrote: > Hi Mon Ping, > > Discussing this with others in AMD it came up if it is possible for LLVM to > take a program that has a reducible graph (any C code without goto/setjmp) > and generate one that is irreducible? If it is the case that the code is > actually structured coming in, a simple

Hi, Comments inline. Ben On 18/07/2008 16:30, "Eli Friedman" <eli.friedman at gmail.com> wrote: > On Fri, Jul 18, 2008 at 6:45 AM, Benedict Gaster > <benedict.gaster at amd.com> wrote: >> Consider the following C code: >> >> typedef __attribute__(( ext_vector_type(2) )) float float2; >> typedef __attribute__(( ext_vector_type(2) ))

On Mon, Jun 15, 2009 at 5:49 PM, Gaster, Benedict<Benedict.Gaster at amd.com> wrote: > I would like to use the LLVM x86 code generator to emit Intel syntax that is > compatible with Microsoft’s MASM 9.x. Taking the TOT LLVM, from last week, I > have found a number of changes that are required to make this work, most of > which are straight forward but a couple I wanted to check

Hi Eli, Yep I was being stupid. Please find attached a patch for initial changes to get MASM working. There is still one problem that I am looking into around changing alignments within SEGMENTS. The problem is that MASM allows 2,4,16,256 alignments, default being 16, but LLVM is sometimes generating 32 alignment, for example, consider the following code: float bar(float fy, float fx) {

Hi, I like Eli approach here. Phases like SimplifyCFG and various loop transformations are just to useful to cleanup code and generate much high quality output. If we look at the passes, I hope we might be able to quantify what changes they make. My hope is that since the incoming graph is reducible that it doesn't cost that much after running these phases to make them reducible

On Fri, Jul 18, 2008 at 6:45 AM, Benedict Gaster <benedict.gaster at amd.com> wrote: > Consider the following C code: > > typedef __attribute__(( ext_vector_type(2) )) float float2; > typedef __attribute__(( ext_vector_type(2) )) __attribute__(( aligned(4) )) AFAIK, the aligned attribute doesn't do anything on a typedef of anything other than a struct/union type in either

Hi, Though I haven't looked into the implementation details, at the high level, I personally think having the address space argument is cleaner than having it encoded as a pointer. The memory barrier places a barrier on the entire address space. When I see the %ptr11 on the memory barrier instruction, my first instinct is to that it is a memory barrier on the region of memory that

>On Mon, Jun 15, 2009 at 5:49 PM, Gaster, >Benedict<Benedict.Gaster at amd.com> wrote: >> I would like to use the LLVM x86 code generator to emit Intel syntax that >> is >> compatible with Microsoft’s MASM 9.x. Taking the TOT LLVM, from last >> week, I >> have found a number of changes that are required to make this work, most >> of >> which

On 2008-07-07, at 05:40, Benedict Gaster wrote: > %r1 = call i32 @llvm.atomic.load.add.p0i32( i32 addrspace(0)* > %ptr0, i32 4) > %r2 = call i32 @llvm.atomic.load.add.p11i32( i32 addrspace(11)* > %ptr11, i32 4) > call void @llvm.memory.barrier(i1 true, i1 true, i1 false, i1 false, > i32 11, i1 false) ; force read-modify-write %ptr11 to complete > > A problem with

On Thu, 3 Jul 2008, Benedict Gaster wrote: > I am slightly unclear about the semantics of the addrspace attribute and > there use with intrinsics. For example, is the following code valid: > > % ptr = malloc i32 addrspace(11) > % result = call i32 @llvm.atomic.load.add.i32( i32 addrspace(11)* %ptr, > i32 4); > > If this is valid it means that a certain amount of type

Thanks, I can now see that this can be implemented with Verifier.cpp. Even with this ability It is unclear that defining llvm.memory.barrier with an explicit address space argument is preferred over the llvm.memory.fence definition where the addrspace is encoded as part of the type as will be the case with the other atomic operations. What do you think? Ben On 7 Jul 2008, at 13:43,

Hi, I got pulled off doing other things last week but I plan to get the support for address spaces to the intrinsics this week. As Benedict noted, the problem is that we don't carry the address space information with the intrinsics. Today, we will do an implicit cast to the default address space. My change will prevent that from happening by allowing the intrinsic to have a

Hi Mon Ping, Discussing this with others in AMD it came up if it is possible for LLVM to take a program that has a reducible graph (any C code without goto/setjmp) and generate one that is irreducible? If it is the case that the code is actually structured coming in, a simple pattern matcher could turn everything into if/endif and so on. Ben On 14/08/2008 18:39, "Mon P Wang"