similar to: [LLVMdev] Cross-compiling for cortex-m3: how do I get ride of -ccc-gcc-name ?

Making a symlink to clang in the same directory as the GCC / binutils (I'll call it $ARM_BIN) called arm-none-linux-gnueabi-clang (and one with clang++ too) and another link in the $ARM_BIN/../lib directory to clang directory located under clang's lib (for includes) should be enough. Gordon Keiser Software Development Engineer Arxan Technologies gkeiser at arxan.com www.arxan.com 

On Mon, Jul 30, 2012 at 3:51 AM, Gordon Keiser <gkeiser at arxan.com> wrote: > Making a symlink to clang in the same directory as the GCC / binutils (I'll call it $ARM_BIN) called > > arm-none-linux-gnueabi-clang (and one with clang++ too) > > and another link in the $ARM_BIN/../lib directory to clang directory located under clang's lib (for includes) > should be

On 30 July 2012 09:14, salvatore benedetto <salvatore.benedetto at gmail.com> wrote: > I'm sorry, I should have been more clear. I don't just want to get > right of the option itself, I want not to > have the need to a have a GCC cross-toolchain around. That requires a bit more than just compiling binutils. You'll need a working linker and a perfect interaction between

On Mon, Jul 30, 2012 at 10:27 AM, Renato Golin <rengolin at systemcall.org> wrote: > On 30 July 2012 09:14, salvatore benedetto > <salvatore.benedetto at gmail.com> wrote: >> I'm sorry, I should have been more clear. I don't just want to get >> right of the option itself, I want not to >> have the need to a have a GCC cross-toolchain around. > >

Cool, I'll file a bug tomorrow at work and add you to the CC list. Thanks! Gordon Keiser Software Development Engineer Arxan Technologies gkeiser at arxan.com www.arxan.com  Protecting the App EconomyT  > -----Original Message----- > From: Eric Christopher [mailto:echristo at gmail.com] > Sent: Tuesday, August 20, 2013 9:47 PM > To: Gordon Keiser > Cc: llvmdev at

Hi Anton and JF, Thanks for your review. After reading the source code more carefully, I have come up with a different way fix this issue. We can simply resolve this issue by adding ARMII::MO_PLT flags with MachineInstrBuilder in FastISel pass (without failing back to DAG lowering). The new patch is attached, and the test case is not changed. Sorry for your inconvenience. Please have a

On 04/12/2012 06:29, Michael Spencer wrote: > On Mon, Dec 3, 2012 at 8:08 PM, Gordon Keiser <gkeiser at arxan.com> wrote: >> As an update to this: >> http://connect.microsoft.com/VisualStudio/feedback/details/769222/cl-exe-ice-when-building-llvm-trunk-at-o2 >> >> Microsoft has reproduced the ICE, given a workaround, and is planning a fix for a future MSVC release.

LGTM On Wed, Aug 21, 2013 at 1:51 PM, Logan Chien <tzuhsiang.chien at gmail.com> wrote: > Hi, > > I have created a workaround to deal with the PIC function call. With this > patch, the FastISel will switch back to DAG lowering mechanism if (1) there > is a function call in the basic block and (2) the relocation model is PIC. > Please have a look. Hoping the patch will

> On Behalf Of Nicholas Chapman > > On 04/12/2012 06:29, Michael Spencer wrote: > > On Mon, Dec 3, 2012 at 8:08 PM, Gordon Keiser <gkeiser at arxan.com> > wrote: > >> As an update to this: > >> http://connect.microsoft.com/VisualStudio/feedback/details/769222/cl- > >> exe-ice-when-building-llvm-trunk-at-o2 > >> > >> Microsoft

I'm not very familiar with relocations but your fix looks the same as ARMTargetLowering::LowerCall, so from that perspective it lgtm (but I may be missing something). On Wed, Aug 21, 2013 at 8:04 AM, Logan Chien <tzuhsiang.chien at gmail.com>wrote: > Hi Anton and JF, > > Thanks for your review. After reading the source code more carefully, I > have come up with a

On 18 July 2012 15:46, salvatore benedetto <salvatore.benedetto at gmail.com> wrote: > $ clang++ -ccc-host-triple thumbv7m-none-gnueabi noInclude.cpp -c > --sysroot=/home/emitrax/CodeSourcery/Sourcery_G++_Lite/arm-none-linux-gnueabi/libc/ Try -ccc-gcc-name arm-none-linux-gnueabi-g++ -ccc-host-triple thumbv7m-none-linux-gnueabi Sometimes it's better than sysroot, as it finds it

As an update to this: http://connect.microsoft.com/VisualStudio/feedback/details/769222/cl-exe-ice-when-building-llvm-trunk-at-o2 Microsoft has reproduced the ICE, given a workaround, and is planning a fix for a future MSVC release. I know not a lot of people are building with VS, but it's nice to know. The workaround involves marking a single function with attribute((noinline)) and is

On Wed, Jul 18, 2012 at 5:45 PM, Renato Golin <rengolin at systemcall.org> wrote: > On 18 July 2012 15:46, salvatore benedetto > <salvatore.benedetto at gmail.com> wrote: >> $ clang++ -ccc-host-triple thumbv7m-none-gnueabi noInclude.cpp -c >> --sysroot=/home/emitrax/CodeSourcery/Sourcery_G++_Lite/arm-none-linux-gnueabi/libc/ > > Try -ccc-gcc-name

Hi, I have created a workaround to deal with the PIC function call. With this patch, the FastISel will switch back to DAG lowering mechanism if (1) there is a function call in the basic block and (2) the relocation model is PIC. Please have a look. Hoping the patch will help. Sincerely, Logan On Wed, Aug 21, 2013 at 10:17 AM, Gordon Keiser <gkeiser at arxan.com> wrote: > Cool,

That change seems to fix things here. Thanks! -Gordon From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of JF Bastien Sent: Wednesday, August 21, 2013 12:53 PM To: Logan Chien Cc: llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] Broken PLT on ARM from R183966 I'm not very familiar with relocations but your fix looks the same as

lgtm On Wed, Aug 21, 2013 at 3:18 AM, Anton Korobeynikov <anton at korobeynikov.info > wrote: > LGTM > > On Wed, Aug 21, 2013 at 1:51 PM, Logan Chien <tzuhsiang.chien at gmail.com> > wrote: > > Hi, > > > > I have created a workaround to deal with the PIC function call. With > this > > patch, the FastISel will switch back to DAG lowering

For ARM targets on linux, revision 183966 made Fast ISel default. Unfortunately, Fast ISel is broken in terms of applying the ARMII::MO_PLT flags to calls in PIC mode (at least when emitting assembly); it never does this. The normal ISel pass handles this situation correctly so a temporary local change to disable FastISel for linux / NaCl targets is working for me right now. I'm not very

Filing a bug would be a good start, go ahead and cc me and jfb at google.com. Thanks! -eric On Tue, Aug 20, 2013 at 6:10 PM, Gordon Keiser <gkeiser at arxan.com> wrote: > For ARM targets on linux, revision 183966 made Fast ISel default. > Unfortunately, Fast ISel is broken in terms of applying the ARMII::MO_PLT > flags to calls in PIC mode (at least when emitting assembly); it

On 18 July 2012 14:57, salvatore benedetto <salvatore.benedetto at gmail.com> wrote: > $ clang -march=armv7-m -mfloat-abi=soft -ccc-host-triple > armv7m-none-gnueabi testReference.cpp -c > fatal error: error in backend: CPU: 'cortex-m3' does not support ARM > mode execution! Ah, yes! Try: $ clang -ccc-host-triple thumbv7m-none-gnueabi testReference.cpp -c Cross

On 18 July 2012 14:33, salvatore benedetto <salvatore.benedetto at gmail.com> wrote: > but I still haven't figure out how to build for cortex-m3 > > clang -march=armv7-m -mfloat-abi=soft <something missing?> testReference.cpp -c -march should have done the trick. You can also try -mcpu=cortex-m3, or try -ccc-host-triple armv7m-none-gnueabi (or -eabi), and possibly