similar to: [LLVMdev] A problem with inline assembly in llvmc for ARM

Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] A problem with inline assembly in llvmc for ARM"

2012 Jul 11
0
[LLVMdev] A problem with inline assembly in llvmc for ARM
Looks like a problem with llvmc. Your example works fine with clang. ~/tmp $ cat foo.c void foo() { __asm__ volatile ("push {r4}\n\t"); } gilgamesh: ~/tmp $ clang -target arm-linux-eabi -S -Os foo.c -o - .syntax unified .eabi_attribute 20, 1 .eabi_attribute 21, 1 .eabi_attribute 23, 3 .eabi_attribute 24, 1 .eabi_attribute 25, 1 .file "foo.c" .text .globl foo
2013 Jun 12
2
[LLVMdev] Apple clang 4.2 based on llvm 3.2 produces a wrong "instruction requires:arm-mode"
So probably it is a LLVM issue - can anyone from the team look at it and let me know if there is anything to do. Moshe > Date: Wed, 12 Jun 2013 10:53:56 -0700 > Subject: Re: [LLVMdev] Apple clang 4.2 based on llvm 3.2 produces a wrong "instruction requires:arm-mode" > From: t.p.northover at gmail.com > To: mkravchik at hotmail.com > CC: llvmdev at cs.uiuc.edu > >
2012 Jul 26
0
[LLVMdev] A pragma to turn the optimizations off
Hi, I'm looking for a pragma to insert in my source that will turn the optimization off for that file. Could not find one, it is possible? Thanks a lot,Moshe -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20120726/e713a744/attachment.html>
2013 Jun 12
0
[LLVMdev] Apple clang 4.2 based on llvm 3.2 produces a wrong "instruction requires:arm-mode"
Hi Moshe, Tim just did tell you what to do :) "Reporting it at llvm.org/bugs (and/or bugreporter.apple.com since that seems to be your platform) would make sure it doesn't get lost." So filing a bug report would be best. -eric On Wed, Jun 12, 2013 at 12:18 PM, Moshe Kravchik <mkravchik at hotmail.com> wrote: > So probably it is a LLVM issue - can anyone from the team
2012 Jul 26
1
[LLVMdev] A pragma to turn the optimizations off
On Thu, Jul 26, 2012 at 12:48 AM, Moshe Kravchik <mkravchik at hotmail.com> wrote: > > Hi, > > I'm looking for a pragma to insert in my source that will turn the > optimization off for that file. Could not find one, it is possible? > > Thanks a lot, > Moshe No, clang does not have a pragma for this. You should use your build system to pass -O0 to clang for this
2013 Jun 12
4
[LLVMdev] Apple clang 4.2 based on llvm 3.2 produces a wrong "instruction requires:arm-mode"
Hi, I've got an assembly file which used to compile with previous clang versions. However with 4.2 I get the following error: admin$ /Applications/Xcode.app/Contents/Developer/Toolchains/XcodeDefault.xctoolchain/usr/bin/clang -arch armv7 ./src/asm.s -o asm.o ./src/asm.s:30:5: error: instruction requires a CPU feature not currently enabled add r2, pc, r2 According to ARM
2013 Jun 12
0
[LLVMdev] Apple clang 4.2 based on llvm 3.2 produces a wrong "instruction requires:arm-mode"
Moshe, You're more than likely going to get a better response from https://devforums.apple.com/community/tools/xcode llvmdev is a mailing list for the LLVM project which is separate from Xcode development. Cheers, Joe On Jun 12, 2013, at 8:51 AM, Moshe Kravchik <mkravchik at hotmail.com<mailto:mkravchik at hotmail.com>> wrote: Hi, I've got an assembly file which used to
2012 Jul 11
2
[LLVMdev] A problem with inline assembly in llvmc for ARM
> Looks like a problem with llvmc. Your example works fine with clang. llvmc does not do the actual compilation, it executed llvm-gcc / llc. So, it seems problem is there. Anyway, LLVM 2.9 is too ancient, especially for ARM. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University
2009 Mar 30
2
[LLVMdev] llvmc issues on x86_32
According to the FAQ llvmc is considered experimental/unsupported. But FWIW, here's an issue I found while trying to use it on 32 bit x86 systems. tools/llvmc/plugins/Base/Base.td hardcodes the -relocation-model=pic option into invocations of llc: def llc : Tool< [(in_language "llvm-bitcode"), (out_language "assembler"), (output_suffix "s"), (cmd_line
2009 Mar 31
0
[LLVMdev] llvmc issues on x86_32
Hi, > According to the FAQ llvmc is considered experimental/unsupported. But > FWIW, here's an issue I found while trying to use it on 32 bit x86 systems. I am the primary maintainer of llvmc. First of all, thanks for your bug report. > tools/llvmc/plugins/Base/Base.td hardcodes the -relocation-model=pic > option into invocations of llc: This part was copied verbatim from the
2009 Apr 01
2
[LLVMdev] llvmc issues on x86_32
Mikhail Glushenkov wrote: > I removed the '-relocation-model' bit from the default invocation > string for llc. To pass arguments to llc, use the new "-Wllc" > option. I'd say that this is the proper solution, even though it breaks backward compatibility on x86_64. But given that llvmc is still considered experimental, better do it now than later. ;-) Thanks a lot
2009 Jun 07
0
[LLVMdev] llvmc for PIC16
Hi Sanjiv, Sanjiv Gupta <sanjiv.gupta <at> microchip.com> writes: > The salient features that we want to have in the driver are: > [...] As promised, I've implemented a basic compiler driver for the PIC16 toolchain. It's under tools/llvmc/examples/mcc16. Some examples illustrating the features you requested: > 2. If the user has specified to generate the final
2009 Jun 15
3
[LLVMdev] llvmc for PIC16
Mikhail Glushenkov wrote: > > Hi Sanjiv, > > Sanjiv Gupta <sanjiv.gupta <at> microchip.com> writes: > > > The salient features that we want to have in the driver are: > > [...] > > As promised, I've implemented a basic compiler driver for the > PIC16 toolchain. It's under tools/llvmc/examples/mcc16. > Hi Mikhail, How do you build mcc16
2009 Jun 05
4
[LLVMdev] llvmc for PIC16
> I'll be happy to answer any further questions you may have, feel free to e-mail > me directly (though right now our mail server is down) > The salient features that we want to have in the driver are: 1. llvm-ld will be used as "The Optimizer". 2. If the user has specified to generate the final executable, then llvm-ld should run on all the .bc files generated by clang
2012 Jul 11
0
[LLVMdev] A problem with inline assembly in llvmc for ARM
Thanks for your reply, so what do you suggest?Do you know if there is a version that fixes this? Moshe > From: anton at korobeynikov.info > Date: Wed, 11 Jul 2012 21:45:29 +0400 > Subject: Re: [LLVMdev] A problem with inline assembly in llvmc for ARM > To: grosbach at apple.com > CC: mkravchik at hotmail.com; llvmdev at cs.uiuc.edu > > > Looks like a problem with llvmc.
2011 Feb 18
0
[LLVMdev] Adding "S" suffixed ARM/Thumb2 instructions
On Feb 17, 2011, at 10:35 PM, Вадим Марковцев wrote: > Hello everyone, > > I've added the "S" suffixed versions of ARM and Thumb2 instructions to tablegen. Those are, for example, "movs" or "muls". > Of course, some instructions have already had their twins, such as add/adds, and I leaved them untouched. Adding separate "s" instructions is
2012 Sep 26
3
[LLVMdev] [Questions] clang cross compilation and SimpleScalar simulation
Hi Jim, On Tue, Sep 25, 2012 at 10:52:58AM -0700, Jim Grosbach wrote: > These errors are from the assembler, not LLVM. Specifically, your binutils is > too old. Given that it doesn't even recognize the ".syntax" directive, they're > *very* much too old. You need to upgrade. > -Jim She said in her previous mail, P.S. Because I got error when I use
2011 Feb 18
2
[LLVMdev] Adding "S" suffixed ARM/Thumb2 instructions
Hello everyone, I've added the "S" suffixed versions of ARM and Thumb2 instructions to tablegen. Those are, for example, "movs" or "muls". Of course, some instructions have already had their twins, such as add/adds, and I leaved them untouched. Besides, I propose the codegen optimization based on them, which removes the redundant comparison in patterns like orr
2019 Jul 12
2
[cfe-dev] ARM float16 intrinsic test
Dear list, git checkout llvmorg-8.0.0 -b llvm8.0 cmake -G "Unix Makefiles" ../llvm-project/llvm -DCMAKE_BUILD_TYPE=Debug -DLLVM_ENABLE_PROJECTS="clang;lld" -DLLVM_TARGETS_TO_BUILD="X86;NVPTX;AMDGPU;ARM;AArch64" [arm.cpp] #define vst4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ float16x4x4_t __s1 = __p1; \ __builtin_neon_vst4_lane_v(__p0, __s1.val[0],
2019 Jul 12
2
[cfe-dev] ARM float16 intrinsic test
Hi, I do not get your result. Do I miss something? $COMP_ROOT/clang++ --target=arm-arm-eabihf -march=armv8.2a+fp16 arm.cpp -S -o - -O3 .text .syntax unified .eabi_attribute 67, "2.09" .eabi_attribute 6, 14 .eabi_attribute 7, 65 .eabi_attribute 8, 1 .eabi_attribute 9, 2 .fpu crypto-neon-fp-armv8 .eabi_attribute 12, 4