similar to: [LLVMdev] LLVM IR atomics: difference between unordered and monotonic?

On Mon, Aug 22, 2011 at 9:55 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: > In the definition of 'monotonic' ordering, > ... "If an address is written monotonically by one thread, and other > threads monotonically read that address repeatedly, the other threads > must eventually see the write"... It's supposed to mean that if you have a something

Hello all, I have an ordered factor that I would like to include in the linear predictor of a binomial glm, where the estimated coefficients are constrained to be monotonic. Does anyone know how to do this? I've tried using an ordered factor but this does not have the desired effect, an (artificial) example of this follows; n <- 100 strings <- sample(c("low",

In the definition of 'monotonic' ordering, ... "If an address is written monotonically by one thread, and other threads monotonically read that address repeatedly, the other threads must eventually see the write"... Does this mean if a thread does multi-writes monotonically, monotonic reads from other threads should see all of them? But intuitively, it seems to be fine for a

On Mon, Aug 22, 2011 at 1:02 PM, Eli Friedman <eli.friedman at gmail.com> wrote: > On Mon, Aug 22, 2011 at 9:55 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: >> In the definition of 'monotonic' ordering, >> ... "If an address is written monotonically by one thread, and other >> threads monotonically read that address repeatedly, the other

On Mon, Aug 22, 2011 at 11:17 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: > On Mon, Aug 22, 2011 at 1:02 PM, Eli Friedman <eli.friedman at gmail.com> wrote: >> On Mon, Aug 22, 2011 at 9:55 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: >>> In the definition of 'monotonic' ordering, >>> ... "If an address is written

On Mon, Aug 22, 2011 at 3:02 PM, Eli Friedman <eli.friedman at gmail.com> wrote: > On Mon, Aug 22, 2011 at 11:17 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: >> On Mon, Aug 22, 2011 at 1:02 PM, Eli Friedman <eli.friedman at gmail.com> wrote: >>> On Mon, Aug 22, 2011 at 9:55 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: >>>> In

On Mon, Aug 22, 2011 at 3:02 PM, Eli Friedman <eli.friedman at gmail.com> wrote: > On Mon, Aug 22, 2011 at 11:17 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: >> On Mon, Aug 22, 2011 at 1:02 PM, Eli Friedman <eli.friedman at gmail.com> wrote: >>> On Mon, Aug 22, 2011 at 9:55 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote: >>>> In

Hi Everyone, This might be more a C/C++11 question than a LLVM question: I wondering if it is semantically correct to access an ordinary variable via atomic operations, like: int val; void foo(){ atomic_store((atomic_int *)(&val), 42); } I tried this simple program on clang+llvm and 42 seems to be correctly stored to val. But, is this just by luck or a right way to go? Thanks. - Lei

On Sat, Aug 4, 2012 at 12:11 AM, Lei Zhao <leizhao833 at gmail.com> wrote: > Hi Everyone, > > This might be more a C/C++11 question than a LLVM question: I wondering if it is semantically correct to access an ordinary variable via atomic operations, like: > > int val; > void foo(){ atomic_store((atomic_int *)(&val), 42); } > > I tried this simple program on

Hi All, I noticed LLVM target independent side is converting an ordered less than "setolt" into unordered greater than "setuge" operation. There are no target hooks to control going from the ordered mode into unordered. I am trying to figure out the best way to support unordered operation on Hexagon. We don't have a single instruction to do unordered operation. So we

There was some discussion a while back about adding a C++0x-style memory model and atomics for LLVM a while back (http://thread.gmane.org/gmane.comp.compilers.llvm.devel/31295), but it got stalled. I'm going to try and restart progress on it. Attached are two patches; the first adds a section to LangRef with just the memory model, without directly changing the documentation or implementation

Hi, In my version of R, the stats package splinefun code for fitting a Fritsch and Carlson monotonic spline does not appear to guarantee a monotonic result. If two adjoining sections both have over/undershoot the way the resulting adjustment of alpha and beta is performed can give modified values which still do not satisfy the required constraints. I do not think this is due to finite precision

Hi, I'm trying to find an implementation of monotonic regression in R and I haven't been able to find anything that's really related to this. isoMDS in the MASS package uses monotonic regression, however, I was wondering if there is any standalone function for monotonic regression? Basically what I'm trying to do is implement monotonic regression where I can see not just the

It works. But a follow-up question: why do I have to compile it to thumb mode in order to pass the compilation? Is there a way to make it compile to regular arm mode? Thanks. - Lei On Aug 16, 2012, at 4:00 PM, Eli Friedman wrote: > On Thu, Aug 16, 2012 at 12:55 PM, Lei Zhao <leizhao833 at gmail.com> wrote: >> Hi Everybody, >> >> I recently did a cross-compiling

On Tue, Jul 9, 2013 at 3:00 PM, <sundeepk at codeaurora.org> wrote: > Hi All, > > I noticed LLVM target independent side is converting an ordered less than > "setolt" into unordered greater than "setuge" operation. There are no > target hooks to control going from the ordered mode into unordered. > > I am trying to figure out the best way to support

> From my reading of Atomics.rst, it would be sound to reorder (It does not > say much about load-linked, so I am treating it as a normal load here) > >> store seq_cst >> fence release >> load-linked monotonic > > into > >> load-linked monotonic >> store seq_cst >> fence release > Which would make an execution ending in %old_x = %old_y = 0

On 29 August 2013 10:12, Demikhovsky, Elena <elena.demikhovsky at intel.com> wrote: > But this is another case. LLVM IR distinguishes between ordered and unordered compare and X86 backend has appropriate instructions. I think LLVM uses ordered/unordered compare to mean something different to what the x86 instructions do. For example, "not equal": fcmp une == unordered not

But this is another case. LLVM IR distinguishes between ordered and unordered compare and X86 backend has appropriate instructions. But during DAG selection we just lose this information and always generate unordered fcmp. I.e. in case of ordered fcmp the vcomiss should be generated, and in case of unordered - vucomiss. - Elena -----Original Message----- From: Dr D. Chisnall [mailto:dc552 at

> The function ISD::getSetCCInverse() would probably be useful for you > here: you can use it to transform an unordered operation into an > ordered operation. Thanks for your reply Eli. I will check how to convert unordered operations back to ordered one. I have another related question - is it possible for frontend (clang) to generate unordered operation from the source code? -Sundeep

Greetings all, I am picking up the work that was started in https://reviews.llvm.org/D27133 — adding support for an element-atomic memcpy/memset/memmove to LLVM. I would appreciate suggestions/thoughts/advice/comments on how to best proceed with this work in a way that will be acceptable to the LLVM group. I apologize in advance; this is going to be a long one... **Background** Loads/stores